[PATCH] D53579: [AArch64] Do 64-bit vector move of 0 and -1 by extracting from the 128-bit move

[John Brawn via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL345270: [AArch64] Do 64-bit vector move of 0 and -1 by extracting from the 128-bit move (authored by john.brawn, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D53579?vs=170647&id=171101#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D53579

Files:
  llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/trunk/test/CodeGen/AArch64/aarch64-be-bv.ll
  llvm/trunk/test/CodeGen/AArch64/aarch64-smax-constantfold.ll
  llvm/trunk/test/CodeGen/AArch64/arm64-neon-compare-instructions.ll
  llvm/trunk/test/CodeGen/AArch64/arm64-neon-copy.ll
  llvm/trunk/test/CodeGen/AArch64/arm64-vector-ext.ll
  llvm/trunk/test/CodeGen/AArch64/arm64-vshuffle.ll
  llvm/trunk/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll
  llvm/trunk/test/CodeGen/AArch64/bitcast.ll
  llvm/trunk/test/CodeGen/AArch64/fast-isel-cmp-vec.ll
  llvm/trunk/test/CodeGen/AArch64/fold-constants.ll
  llvm/trunk/test/CodeGen/AArch64/machine_cse.ll
  llvm/trunk/test/CodeGen/AArch64/neon-compare-instructions.ll
  llvm/trunk/test/CodeGen/AArch64/selectiondag-order.ll

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