[PATCH] D53668: [LV] Support vectorization of interleave-groups that require an epilog under optsize using masked wide loads

[Dorit Nuzman via Phabricator via llvm-commits]

dorit created this revision.
dorit added reviewers: Ayal, hsaito, dcaballe, fhahn.
Herald added subscribers: jsji, rkruppe, kbarton, javed.absar, nemanjai.

Under Opt for Size, the vectorizer does not vectorize interleave-groups that have gaps at the end of the group (such as a loop that reads only the even elements: a[2*i]) because that implies that we'll require a scalar epilogue (which is not allowed under Opt for Size). This patch extends the support for masked-interleave-groups (introduced by https://reviews.llvm.org/D53011 for conditional accesses) to also cover the case of gaps in a group of loads;  Targets that enable the masked-interleave-group feature don't have to invalidate interleave-groups of loads with gaps; they could now use masked wide-loads and shuffles (if that's what the cost model selects).


https://reviews.llvm.org/D53668

Files:
  include/llvm/Analysis/TargetTransformInfo.h
  include/llvm/Analysis/TargetTransformInfoImpl.h
  include/llvm/Analysis/VectorUtils.h
  include/llvm/CodeGen/BasicTTIImpl.h
  lib/Analysis/TargetTransformInfo.cpp
  lib/Analysis/VectorUtils.cpp
  lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  lib/Target/AArch64/AArch64TargetTransformInfo.h
  lib/Target/ARM/ARMTargetTransformInfo.cpp
  lib/Target/ARM/ARMTargetTransformInfo.h
  lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
  lib/Target/Hexagon/HexagonTargetTransformInfo.h
  lib/Target/PowerPC/PPCTargetTransformInfo.cpp
  lib/Target/PowerPC/PPCTargetTransformInfo.h
  lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
  lib/Target/SystemZ/SystemZTargetTransformInfo.h
  lib/Target/X86/X86TargetTransformInfo.cpp
  lib/Target/X86/X86TargetTransformInfo.h
  lib/Transforms/Vectorize/LoopVectorize.cpp
  test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll

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