[PATCH] D53306: [X86] Stop promoting integer loads to vXi64

[Sanjoy Das via llvm-commits]

Hi Craig,

+CC My work email

I've attached the IR that I think is miscompiled after this patch
(this is the post-optimization IR, after LLVM IR opts have run).  The
miscompile happens on broadwell at least, but may also happen on other
archs.

Let me know if there's anything I can do to help you diagnose this.

-- Sanjoy

On Mon, Oct 22, 2018 at 10:26 AM, Sam McCall via Phabricator
<reviews at reviews.llvm.org> wrote:
> sammccall added a comment.
>
> In https://reviews.llvm.org/D53306#1270947, @craig.topper wrote:
>
>> @sammccall I've reverted the change in r344921.  Is there anything you can do to help narrow this down? Ideally providing the LLVM IR for the failing case.
>
>
> Thanks Craig!
> I've looped in @sanjoy who knows way more about this than I do, and has access to our internal continuous integration.
> (I bet it's reproducible in the upstream TensorFlow repo too, but I don't have a build environment for that).
>
>
> Repository:
>   rL LLVM
>
> https://reviews.llvm.org/D53306
>
>
>
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