[PATCH] D53444: Support ARM_V4BX relocation

[Peter Smith via Phabricator via llvm-commits]

peter.smith added a comment.

This change looks fine to me. Just to check what CPU you are intending to run the output on. The LLD interworking, Thunk and PLT support assumes the presence of the BLX instruction which is only present on ARMv5 CPUs and above (LLD will warn if it doesn't detect at least one object compiled for ARMv5 or above).

Do you actually need ARMv4t support? I can work on supporting it but it probably wouldn't be optimal. At a minimum we'd need to insert Thunks for every interworking BL, including all Thumb calls to PLT sequences, prevent ARM and Thumb callers from sharing the a Thunk that starts in a different state, and have a new set of Thunks that avoid v5t instructions.

>From memory, when the ABI was created the number of ARM only ARMv4 CPUs was tiny compared to those supporting ARM and Thumb, and all future CPUs would support Thumb so to simplify code generation it was assumed that BX reg could always be generated and a linker could translate it if needed.

>From the ABI for the ARM Architecture:
R_ARM_V4BX records the location of an ARMv4t BX instruction. This enables a static linker to generate ARMv4 compatible images from ARMv4t objects containing only ARM code by converting the instruction to MOV PC, r, where r is the register used in the BX instruction. See [AAPCS] for details. The symbol is unused and may even be the NULL symbol (index 0).


Repository:
  rLLD LLVM Linker

https://reviews.llvm.org/D53444