[PATCH] D53229: [LegalizeTypes] Teach PromoteIntRes_BITCAST to better handle a bitcast with vector output type and a vector input type that needs to be widened

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

I'd like to see more test coverage for this, I think.  If I'm following correctly, this should affect something like the following on AArch64?

  define <2 x i16> @foo(<2 x half> %x) {
    %y = bitcast <2 x half> %x to <2 x i16>
    ret <2 x i16> %y
  }



================
Comment at: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:324
+                             DAG.getConstant(0, dl, IdxTy));
+          return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, InOp);
+        }
----------------
Should we just generate an ANY_EXTEND_VECTOR_INREG directly here?


https://reviews.llvm.org/D53229