[PATCH] D53224: [RISCV] Eliminate unnecessary masking of promoted shift amounts

[Alex Bradbury via Phabricator via llvm-commits]

asb added a comment.

Yes, I'll add the appropraite SLLW/SRAW/SRLW patterns in the RV64I codegen patch. Given this improvement isn't specific to RV64I, I wrote this patch to apply against current HEAD.


https://reviews.llvm.org/D53224