[PATCH] D53160: AMDGPU: Restrict DS load/store vectorizing on SI

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp:296
+
+    KnownBits Bits = computeKnownBits(BasePtr, DL);
+    return Bits.isNonNegative();
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This seems like an expensive check for this. Is this so important?


Repository:
  rL LLVM

https://reviews.llvm.org/D53160