[PATCH] D52965: [X86][AVX] Improve vXi64 UITOFP vXf64/vXf32 support (P38226/PR38970)

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Oct 6 16:14:04 PDT 2018


RKSimon created this revision.
RKSimon added reviewers: craig.topper, spatel, andreadb, efriedma, hfinkel.

An initial attempt to try and improve vXi64 UITOFP conversions:

vXi64-vXf64 - perform this as a true vectorization instead of (partially vectorized) scalar conversions by adding vector support to ExpandLegalINT_TO_FP)
vXi64-vXf32 - SSE customized versions of the ExpandLegalINT_TO_FP code, avoiding a lot of branches that were often poorly predicted

There's still room for improvement:

uitofp_4i64_to_4f64 - AVX1 codegen should be able to perform the vpsrlq xmm shifts as ymm (v8f32) shuffles
uitofp_Xi64_to_Xf32 - some of the BLENDV cases should be selected from the sign bit directly and not need a shift/comparison


Repository:
  rL LLVM

https://reviews.llvm.org/D52965

Files:
  lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/vec_int_to_fp.ll

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