[PATCH] D52656: [LV] Teach vectorizer about variant value store into uniform address

[Anna Thomas via Phabricator via llvm-commits]

anna marked 3 inline comments as done.
anna added inline comments.


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Comment at: test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll:7
+; CHECK-LABEL: @foo(
+; CHECK: <4 x i32>
+; CHECK: ret void
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Ayal wrote:
> CHECK how LV actually vectorizes the invariant store, rather than if it emits a vector type?
> 
> Would be good to include a test having two conditional invariant stores.
> CHECK how LV actually vectorizes the invariant store, rather than if it emits a vector type?

LV vectorizing the invariant store in this case is undefined behaviour because the user incorrectly tagged the loop as parallel. Pls see the PR15794 mentioned below. 

Do we still need to see how LV vectorizes the invariant store because the code generated is anyway incorrect in the presence of output dependency. See test case below which is the same test case without the incorrect mem_parallel.loop metadata and we don't vectorize it.

> Would be good to include a test having two conditional invariant stores.
Will do in the invariant-store-vectorization case below.


Repository:
  rL LLVM

https://reviews.llvm.org/D52656