[PATCH] D52656: [LV] Teach vectorizer about variant value store into uniform address

[Ayal Zaks via Phabricator via llvm-commits]

Ayal added inline comments.


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Comment at: include/llvm/Analysis/LoopAccessAnalysis.h:623
 
-  /// Indicator that there is a store of a variant value to a uniform address.
-  bool HasVariantStoreToLoopInvariantAddress;
+  /// Indicator that there multiple stores to a uniform address.
+  bool HasMultipleStoresToLoopInvariantAddress;
----------------
there [are] multiple


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Comment at: lib/Analysis/LoopAccessAnalysis.cpp:2307
 
-  OS.indent(Depth) << "Variant Store to invariant address was "
-                   << (HasVariantStoreToLoopInvariantAddress ? "" : "not ")
+  OS.indent(Depth) << "Multiple stores to invariant address was "
+                   << (HasMultipleStoresToLoopInvariantAddress ? "" : "not ")
----------------
was >> were


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Comment at: test/Analysis/LoopAccessAnalysis/memcheck-wrapping-pointers.ll:42
 ; CHECK-NEXT:          Member: {%b,+,4}<%for.body>
-; CHECK:         Variant Store to invariant address was not found in loop.
+; CHECK:         Multiple stores to invariant address was not found in loop.
 ; CHECK-NEXT:    SCEV assumptions:
----------------
was >> were (+ multiple occurrences below)


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Comment at: test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll:7
+; CHECK-LABEL: @foo(
+; CHECK: <4 x i32>
+; CHECK: ret void
----------------
CHECK how LV actually vectorizes the invariant store, rather than if it emits a vector type?

Would be good to include a test having two conditional invariant stores.


Repository:
  rL LLVM

https://reviews.llvm.org/D52656