[llvm] r343312 - [llvm-mca] Remove redundant namespace prefixes. NFC
Andrea Di Biagio via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 28 03:47:24 PDT 2018
Author: adibiagio
Date: Fri Sep 28 03:47:24 2018
New Revision: 343312
URL: http://llvm.org/viewvc/llvm-project?rev=343312&view=rev
Log:
[llvm-mca] Remove redundant namespace prefixes. NFC
We are already "using" namespace llvm in all the files modified by this change.
Modified:
llvm/trunk/tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp
llvm/trunk/tools/llvm-mca/lib/HardwareUnits/ResourceManager.cpp
llvm/trunk/tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp
llvm/trunk/tools/llvm-mca/lib/InstrBuilder.cpp
llvm/trunk/tools/llvm-mca/lib/Instruction.cpp
llvm/trunk/tools/llvm-mca/lib/Pipeline.cpp
llvm/trunk/tools/llvm-mca/lib/Stages/DispatchStage.cpp
llvm/trunk/tools/llvm-mca/lib/Stages/ExecuteStage.cpp
Modified: llvm/trunk/tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp?rev=343312&r1=343311&r2=343312&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp (original)
+++ llvm/trunk/tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp Fri Sep 28 03:47:24 2018
@@ -24,8 +24,8 @@ using namespace llvm;
namespace mca {
-RegisterFile::RegisterFile(const llvm::MCSchedModel &SM,
- const llvm::MCRegisterInfo &mri, unsigned NumRegs)
+RegisterFile::RegisterFile(const MCSchedModel &SM, const MCRegisterInfo &mri,
+ unsigned NumRegs)
: MRI(mri),
RegisterMappings(mri.getNumRegs(), {WriteRef(), RegisterRenamingInfo()}),
ZeroRegisters(mri.getNumRegs(), false) {
@@ -281,7 +281,7 @@ void RegisterFile::collectWrites(SmallVe
}
// Remove duplicate entries and resize the input vector.
- llvm::sort(Writes, [](const WriteRef &Lhs, const WriteRef &Rhs) {
+ sort(Writes, [](const WriteRef &Lhs, const WriteRef &Rhs) {
return Lhs.getWriteState() < Rhs.getWriteState();
});
auto It = std::unique(Writes.begin(), Writes.end());
Modified: llvm/trunk/tools/llvm-mca/lib/HardwareUnits/ResourceManager.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/lib/HardwareUnits/ResourceManager.cpp?rev=343312&r1=343311&r2=343312&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/lib/HardwareUnits/ResourceManager.cpp (original)
+++ llvm/trunk/tools/llvm-mca/lib/HardwareUnits/ResourceManager.cpp Fri Sep 28 03:47:24 2018
@@ -35,10 +35,10 @@ void DefaultResourceStrategy::skipMask(u
uint64_t DefaultResourceStrategy::select(uint64_t ReadyMask) {
// This method assumes that ReadyMask cannot be zero.
- uint64_t CandidateMask = llvm::PowerOf2Floor(NextInSequenceMask);
+ uint64_t CandidateMask = PowerOf2Floor(NextInSequenceMask);
while (!(ReadyMask & CandidateMask)) {
skipMask(CandidateMask);
- CandidateMask = llvm::PowerOf2Floor(NextInSequenceMask);
+ CandidateMask = PowerOf2Floor(NextInSequenceMask);
}
return CandidateMask;
}
@@ -55,8 +55,8 @@ ResourceState::ResourceState(const MCPro
uint64_t Mask)
: ProcResourceDescIndex(Index), ResourceMask(Mask),
BufferSize(Desc.BufferSize) {
- if (llvm::countPopulation(ResourceMask) > 1)
- ResourceSizeMask = ResourceMask ^ llvm::PowerOf2Floor(ResourceMask);
+ if (countPopulation(ResourceMask) > 1)
+ ResourceSizeMask = ResourceMask ^ PowerOf2Floor(ResourceMask);
else
ResourceSizeMask = (1ULL << Desc.NumUnits) - 1;
ReadyMask = ResourceSizeMask;
@@ -66,7 +66,7 @@ ResourceState::ResourceState(const MCPro
bool ResourceState::isReady(unsigned NumUnits) const {
return (!isReserved() || isADispatchHazard()) &&
- llvm::countPopulation(ReadyMask) >= NumUnits;
+ countPopulation(ReadyMask) >= NumUnits;
}
ResourceStateEvent ResourceState::isBufferAvailable() const {
@@ -87,7 +87,7 @@ void ResourceState::dump() const {
#endif
static unsigned getResourceStateIndex(uint64_t Mask) {
- return std::numeric_limits<uint64_t>::digits - llvm::countLeadingZeros(Mask);
+ return std::numeric_limits<uint64_t>::digits - countLeadingZeros(Mask);
}
static std::unique_ptr<ResourceStrategy>
Modified: llvm/trunk/tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp?rev=343312&r1=343311&r2=343312&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp (original)
+++ llvm/trunk/tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp Fri Sep 28 03:47:24 2018
@@ -21,7 +21,7 @@ using namespace llvm;
namespace mca {
-RetireControlUnit::RetireControlUnit(const llvm::MCSchedModel &SM)
+RetireControlUnit::RetireControlUnit(const MCSchedModel &SM)
: NextAvailableSlotIdx(0), CurrentInstructionSlotIdx(0),
AvailableSlots(SM.MicroOpBufferSize), MaxRetirePerCycle(0) {
// Check if the scheduling model provides extra information about the machine
Modified: llvm/trunk/tools/llvm-mca/lib/InstrBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/lib/InstrBuilder.cpp?rev=343312&r1=343311&r2=343312&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/lib/InstrBuilder.cpp (original)
+++ llvm/trunk/tools/llvm-mca/lib/InstrBuilder.cpp Fri Sep 28 03:47:24 2018
@@ -64,16 +64,15 @@ static void initializeUsedResources(Inst
// Sort elements by mask popcount, so that we prioritize resource units over
// resource groups, and smaller groups over larger groups.
- llvm::sort(Worklist,
- [](const ResourcePlusCycles &A, const ResourcePlusCycles &B) {
- unsigned popcntA = countPopulation(A.first);
- unsigned popcntB = countPopulation(B.first);
- if (popcntA < popcntB)
- return true;
- if (popcntA > popcntB)
- return false;
- return A.first < B.first;
- });
+ sort(Worklist, [](const ResourcePlusCycles &A, const ResourcePlusCycles &B) {
+ unsigned popcntA = countPopulation(A.first);
+ unsigned popcntB = countPopulation(B.first);
+ if (popcntA < popcntB)
+ return true;
+ if (popcntA > popcntB)
+ return false;
+ return A.first < B.first;
+ });
uint64_t UsedResourceUnits = 0;
@@ -351,7 +350,7 @@ InstrBuilder::createInstrDescImpl(const
const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID);
if (SCDesc.NumMicroOps == MCSchedClassDesc::InvalidNumMicroOps) {
std::string ToString;
- llvm::raw_string_ostream OS(ToString);
+ raw_string_ostream OS(ToString);
WithColor::error() << "found an unsupported instruction in the input"
<< " assembly sequence.\n";
MCIP.printInst(&MCI, OS, "", STI);
Modified: llvm/trunk/tools/llvm-mca/lib/Instruction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/lib/Instruction.cpp?rev=343312&r1=343311&r2=343312&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/lib/Instruction.cpp (original)
+++ llvm/trunk/tools/llvm-mca/lib/Instruction.cpp Fri Sep 28 03:47:24 2018
@@ -133,7 +133,7 @@ void Instruction::execute() {
void Instruction::update() {
assert(isDispatched() && "Unexpected instruction stage found!");
- if (!llvm::all_of(Uses, [](const UniqueUse &Use) { return Use->isReady(); }))
+ if (!all_of(Uses, [](const UniqueUse &Use) { return Use->isReady(); }))
return;
// A partial register write cannot complete before a dependent write.
@@ -147,7 +147,7 @@ void Instruction::update() {
return true;
};
- if (llvm::all_of(Defs, IsDefReady))
+ if (all_of(Defs, IsDefReady))
Stage = IS_READY;
}
Modified: llvm/trunk/tools/llvm-mca/lib/Pipeline.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/lib/Pipeline.cpp?rev=343312&r1=343311&r2=343312&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/lib/Pipeline.cpp (original)
+++ llvm/trunk/tools/llvm-mca/lib/Pipeline.cpp Fri Sep 28 03:47:24 2018
@@ -31,26 +31,26 @@ void Pipeline::addEventListener(HWEventL
}
bool Pipeline::hasWorkToProcess() {
- return llvm::any_of(Stages, [](const std::unique_ptr<Stage> &S) {
+ return any_of(Stages, [](const std::unique_ptr<Stage> &S) {
return S->hasWorkToComplete();
});
}
-llvm::Error Pipeline::run() {
+Error Pipeline::run() {
assert(!Stages.empty() && "Unexpected empty pipeline found!");
while (hasWorkToProcess()) {
notifyCycleBegin();
- if (llvm::Error Err = runCycle())
+ if (Error Err = runCycle())
return Err;
notifyCycleEnd();
++Cycles;
}
- return llvm::ErrorSuccess();
+ return ErrorSuccess();
}
-llvm::Error Pipeline::runCycle() {
- llvm::Error Err = llvm::ErrorSuccess();
+Error Pipeline::runCycle() {
+ Error Err = ErrorSuccess();
// Update stages before we start processing new instructions.
for (auto I = Stages.rbegin(), E = Stages.rend(); I != E && !Err; ++I) {
const std::unique_ptr<Stage> &S = *I;
Modified: llvm/trunk/tools/llvm-mca/lib/Stages/DispatchStage.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/lib/Stages/DispatchStage.cpp?rev=343312&r1=343311&r2=343312&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/lib/Stages/DispatchStage.cpp (original)
+++ llvm/trunk/tools/llvm-mca/lib/Stages/DispatchStage.cpp Fri Sep 28 03:47:24 2018
@@ -85,7 +85,7 @@ void DispatchStage::updateRAWDependencie
}
}
-llvm::Error DispatchStage::dispatch(InstRef IR) {
+Error DispatchStage::dispatch(InstRef IR) {
assert(!CarryOver && "Cannot dispatch another instruction!");
Instruction &IS = *IR.getInstruction();
const InstrDesc &Desc = IS.getDesc();
@@ -128,10 +128,10 @@ llvm::Error DispatchStage::dispatch(Inst
return moveToTheNextStage(IR);
}
-llvm::Error DispatchStage::cycleStart() {
+Error DispatchStage::cycleStart() {
if (!CarryOver) {
AvailableEntries = DispatchWidth;
- return llvm::ErrorSuccess();
+ return ErrorSuccess();
}
AvailableEntries = CarryOver >= DispatchWidth ? 0 : DispatchWidth - CarryOver;
@@ -143,7 +143,7 @@ llvm::Error DispatchStage::cycleStart()
notifyInstructionDispatched(CarriedOver, RegisterFiles, DispatchedOpcodes);
if (!CarryOver)
CarriedOver = InstRef();
- return llvm::ErrorSuccess();
+ return ErrorSuccess();
}
bool DispatchStage::isAvailable(const InstRef &IR) const {
@@ -157,7 +157,7 @@ bool DispatchStage::isAvailable(const In
return canDispatch(IR);
}
-llvm::Error DispatchStage::execute(InstRef &IR) {
+Error DispatchStage::execute(InstRef &IR) {
assert(canDispatch(IR) && "Cannot dispatch another instruction!");
return dispatch(IR);
}
Modified: llvm/trunk/tools/llvm-mca/lib/Stages/ExecuteStage.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/lib/Stages/ExecuteStage.cpp?rev=343312&r1=343311&r2=343312&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/lib/Stages/ExecuteStage.cpp (original)
+++ llvm/trunk/tools/llvm-mca/lib/Stages/ExecuteStage.cpp Fri Sep 28 03:47:24 2018
@@ -85,9 +85,9 @@ Error ExecuteStage::issueReadyInstructio
}
Error ExecuteStage::cycleStart() {
- llvm::SmallVector<ResourceRef, 8> Freed;
- llvm::SmallVector<InstRef, 4> Executed;
- llvm::SmallVector<InstRef, 4> Ready;
+ SmallVector<ResourceRef, 8> Freed;
+ SmallVector<InstRef, 4> Executed;
+ SmallVector<InstRef, 4> Ready;
HWS.cycleEvent(Freed, Executed, Ready);
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