[PATCH] D52426: [X86] Move X86DAGToDAGISel::matchBEXTRFromAnd() into X86ISelLowering

Mon Sep 24 23:50:52 PDT 2018

lebedev.ri marked an inline comment as done.
lebedev.ri added a comment.

Thank you for taking a look!

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Comment at: test/CodeGen/X86/extract-bits.ll:5797
+; X64-BMI1NOTBMBMI2-NEXT:    movl $2581, %eax # imm = 0xA15
+; X64-BMI1NOTBMBMI2-NEXT:    bextrl %eax, %edi, %eax
+; X64-BMI1NOTBMBMI2-NEXT:    shll $2, %eax
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craig.topper wrote:
> This is not an improvement. We traded a shift right plus an and for a move immediate, a 2 uop bextr, and a shift left. So we went from 2 uops to 4. At least on Haswell.
Aha. So the D52293 has the same problem, obviously.
Is adding `FeatureSlowBEXTR` the way forward?

Repository:
  rL LLVM

https://reviews.llvm.org/D52426