[PATCH] D52426: [X86] Move X86DAGToDAGISel::matchBEXTRFromAnd() into X86ISelLowering
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 24 16:40:17 PDT 2018
craig.topper added inline comments.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:35252
+
+ Node->dumpr();
+
----------------
Remove the call to dump.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:35308
+
+ New->dumpr();
+
----------------
Remove call to dump.
================
Comment at: test/CodeGen/X86/extract-bits.ll:5797
+; X64-BMI1NOTBMBMI2-NEXT: movl $2581, %eax # imm = 0xA15
+; X64-BMI1NOTBMBMI2-NEXT: bextrl %eax, %edi, %eax
+; X64-BMI1NOTBMBMI2-NEXT: shll $2, %eax
----------------
This is not an improvement. We traded a shift right plus an and for a move immediate, a 2 uop bextr, and a shift left. So we went from 2 uops to 4. At least on Haswell.
Repository:
rL LLVM
https://reviews.llvm.org/D52426
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