[lld] r342746 - Align AArch64 and i386 image base to superpage
Dimitry Andric via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 21 09:58:13 PDT 2018
Author: dim
Date: Fri Sep 21 09:58:13 2018
New Revision: 342746
URL: http://llvm.org/viewvc/llvm-project?rev=342746&view=rev
Log:
Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
Modified:
lld/trunk/ELF/Arch/AArch64.cpp
lld/trunk/ELF/Arch/X86.cpp
lld/trunk/test/ELF/aarch64-abs16.s
lld/trunk/test/ELF/aarch64-abs32.s
lld/trunk/test/ELF/aarch64-call26-thunk.s
lld/trunk/test/ELF/aarch64-condb-reloc.s
lld/trunk/test/ELF/aarch64-copy.s
lld/trunk/test/ELF/aarch64-copy2.s
lld/trunk/test/ELF/aarch64-cortex-a53-843419-large.s
lld/trunk/test/ELF/aarch64-cortex-a53-843419-recognize.s
lld/trunk/test/ELF/aarch64-data-relocs.s
lld/trunk/test/ELF/aarch64-gnu-ifunc-plt.s
lld/trunk/test/ELF/aarch64-gnu-ifunc.s
lld/trunk/test/ELF/aarch64-jump26-thunk.s
lld/trunk/test/ELF/aarch64-lo12-alignment.s
lld/trunk/test/ELF/aarch64-prel16.s
lld/trunk/test/ELF/aarch64-prel32.s
lld/trunk/test/ELF/aarch64-relocs.s
lld/trunk/test/ELF/aarch64-thunk-section-location.s
lld/trunk/test/ELF/aarch64-tls-gdie.s
lld/trunk/test/ELF/aarch64-tls-gdle.s
lld/trunk/test/ELF/aarch64-tls-ie.s
lld/trunk/test/ELF/aarch64-tls-iele.s
lld/trunk/test/ELF/aarch64-tls-le.s
lld/trunk/test/ELF/aarch64-tlsld-ldst.s
lld/trunk/test/ELF/aarch64-tstbr14-reloc.s
lld/trunk/test/ELF/aarch64-undefined-weak.s
lld/trunk/test/ELF/basic-aarch64.s
lld/trunk/test/ELF/basic32.s
lld/trunk/test/ELF/gc-sections-implicit-addend.s
lld/trunk/test/ELF/gnu-ifunc-i386.s
lld/trunk/test/ELF/gnu-ifunc-plt-i386.s
lld/trunk/test/ELF/got-i386.s
lld/trunk/test/ELF/got32-i386.s
lld/trunk/test/ELF/got32x-i386.s
lld/trunk/test/ELF/i386-pc8-pc16-addend.s
lld/trunk/test/ELF/i386-retpoline-nopic.s
lld/trunk/test/ELF/map-file-i686.s
lld/trunk/test/ELF/plt-aarch64.s
lld/trunk/test/ELF/plt-i686.s
lld/trunk/test/ELF/relocation-b-aarch64.test
lld/trunk/test/ELF/relocation-copy-i686.s
lld/trunk/test/ELF/relocation-i686.s
lld/trunk/test/ELF/shared.s
lld/trunk/test/ELF/static-with-export-dynamic.s
lld/trunk/test/ELF/tls-i686.s
lld/trunk/test/ELF/tls-opt-gdiele-i686.s
lld/trunk/test/ELF/tls-opt-i686.s
lld/trunk/test/ELF/tls-opt-iele-i686-nopic.s
lld/trunk/test/ELF/undef-with-plt-addr-i686.s
Modified: lld/trunk/ELF/Arch/AArch64.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/AArch64.cpp?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/AArch64.cpp (original)
+++ lld/trunk/ELF/Arch/AArch64.cpp Fri Sep 21 09:58:13 2018
@@ -67,6 +67,10 @@ AArch64::AArch64() {
PltHeaderSize = 32;
DefaultMaxPageSize = 65536;
+ // Align to the 2 MiB page size (known as a superpage or huge page).
+ // FreeBSD automatically promotes 2 MiB-aligned allocations.
+ DefaultImageBase = 0x200000;
+
// It doesn't seem to be documented anywhere, but tls on aarch64 uses variant
// 1 of the tls structures and the tcb size is 16.
TcbSize = 16;
Modified: lld/trunk/ELF/Arch/X86.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Arch/X86.cpp?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/ELF/Arch/X86.cpp (original)
+++ lld/trunk/ELF/Arch/X86.cpp Fri Sep 21 09:58:13 2018
@@ -60,6 +60,10 @@ X86::X86() {
PltHeaderSize = 16;
TlsGdRelaxSkip = 2;
TrapInstr = 0xcccccccc; // 0xcc = INT3
+
+ // Align to the non-PAE large page size (known as a superpage or huge page).
+ // FreeBSD automatically promotes large, superpage-aligned allocations.
+ DefaultImageBase = 0x400000;
}
static bool hasBaseReg(uint8_t ModRM) { return (ModRM & 0xc7) != 0x5; }
Modified: lld/trunk/test/ELF/aarch64-abs16.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-abs16.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-abs16.s (original)
+++ lld/trunk/test/ELF/aarch64-abs16.s Fri Sep 21 09:58:13 2018
@@ -14,14 +14,14 @@ _start:
// RUN: llvm-objdump -s -section=.data %t2 | FileCheck %s
// CHECK: Contents of section .data:
-// 11000: S = 0x100, A = 0xfeff
-// S + A = 0xffff
-// 11002: S = 0x100, A = -0x8100
-// S + A = 0x8000
-// CHECK-NEXT: 20000 ffff0080
+// 210000: S = 0x100, A = 0xfeff
+// S + A = 0xffff
+// 210002: S = 0x100, A = -0x8100
+// S + A = 0x8000
+// CHECK-NEXT: 210000 ffff0080
-// RUN: not ld.lld %t.o %t255.o -o %t2
-// | FileCheck %s --check-prefix=OVERFLOW
-// RUN: not ld.lld %t.o %t257.o -o %t2
-// | FileCheck %s --check-prefix=OVERFLOW
-// OVERFLOW: Relocation R_AARCH64_ABS16 out of range: 65536 is not in [-32768, 65535]
+// RUN: not ld.lld %t.o %t255.o -o %t2 2>&1 | FileCheck %s --check-prefix=OVERFLOW1
+// OVERFLOW1: relocation R_AARCH64_ABS16 out of range: -32769 is not in [-32768, 32767]
+
+// RUN: not ld.lld %t.o %t257.o -o %t2 2>&1 | FileCheck %s --check-prefix=OVERFLOW2
+// OVERFLOW2: relocation R_AARCH64_ABS16 out of range: 65536 is not in [-32768, 32767]
Modified: lld/trunk/test/ELF/aarch64-abs32.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-abs32.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-abs32.s (original)
+++ lld/trunk/test/ELF/aarch64-abs32.s Fri Sep 21 09:58:13 2018
@@ -14,14 +14,14 @@ _start:
// RUN: llvm-objdump -s -section=.data %t2 | FileCheck %s
// CHECK: Contents of section .data:
-// 20000: S = 0x100, A = 0xfffffeff
-// S + A = 0xffffffff
-// 20004: S = 0x100, A = -0x80000100
-// S + A = 0x80000000
-// CHECK-NEXT: 20000 ffffffff 00000080
+// 210000: S = 0x100, A = 0xfffffeff
+// S + A = 0xffffffff
+// 210004: S = 0x100, A = -0x80000100
+// S + A = 0x80000000
+// CHECK-NEXT: 210000 ffffffff 00000080
-// RUN: not ld.lld %t.o %t255.o -o %t2
-// | FileCheck %s --check-prefix=OVERFLOW
-// RUN: not ld.lld %t.o %t257.o -o %t2
-// | FileCheck %s --check-prefix=OVERFLOW
-// OVERFLOW: Relocation R_AARCH64_ABS32 out of range: 4294967296 is not in [-2147483648, 4294967295]
+// RUN: not ld.lld %t.o %t255.o -o %t2 2>&1 | FileCheck %s --check-prefix=OVERFLOW1
+// OVERFLOW1: relocation R_AARCH64_ABS32 out of range: -2147483649 is not in [-2147483648, 2147483647]
+
+// RUN: not ld.lld %t.o %t257.o -o %t2 2>&1 | FileCheck %s --check-prefix=OVERFLOW2
+// OVERFLOW2: relocation R_AARCH64_ABS32 out of range: 4294967296 is not in [-2147483648, 2147483647]
Modified: lld/trunk/test/ELF/aarch64-call26-thunk.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-call26-thunk.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-call26-thunk.s (original)
+++ lld/trunk/test/ELF/aarch64-call26-thunk.s Fri Sep 21 09:58:13 2018
@@ -11,11 +11,11 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-NEXT: _start:
-// CHECK-NEXT: 20000: 02 00 00 94 bl #8
+// CHECK-NEXT: 210000: 02 00 00 94 bl #8
// CHECK: __AArch64AbsLongThunk_big:
-// CHECK-NEXT: 20008: 50 00 00 58 ldr x16, #8
-// CHECK-NEXT: 2000c: 00 02 1f d6 br x16
+// CHECK-NEXT: 210008: 50 00 00 58 ldr x16, #8
+// CHECK-NEXT: 21000c: 00 02 1f d6 br x16
// CHECK: $d:
-// CHECK-NEXT: 20010: 00 00 00 00 .word 0x00000000
-// CHECK-NEXT: 20014: 10 00 00 00 .word 0x00000010
+// CHECK-NEXT: 210010: 00 00 00 00 .word 0x00000000
+// CHECK-NEXT: 210014: 10 00 00 00 .word 0x00000010
Modified: lld/trunk/test/ELF/aarch64-condb-reloc.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-condb-reloc.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-condb-reloc.s (original)
+++ lld/trunk/test/ELF/aarch64-condb-reloc.s Fri Sep 21 09:58:13 2018
@@ -12,21 +12,21 @@
# 0x1102c - 16 = 0x1101c
# CHECK: Disassembly of section .text:
# CHECK-NEXT: _foo:
-# CHECK-NEXT: 20000: {{.*}} nop
-# CHECK-NEXT: 20004: {{.*}} nop
-# CHECK-NEXT: 20008: {{.*}} nop
-# CHECK-NEXT: 2000c: {{.*}} nop
+# CHECK-NEXT: 210000: {{.*}} nop
+# CHECK-NEXT: 210004: {{.*}} nop
+# CHECK-NEXT: 210008: {{.*}} nop
+# CHECK-NEXT: 21000c: {{.*}} nop
# CHECK: _bar:
-# CHECK-NEXT: 20010: {{.*}} nop
-# CHECK-NEXT: 20014: {{.*}} nop
-# CHECK-NEXT: 20018: {{.*}} nop
+# CHECK-NEXT: 210010: {{.*}} nop
+# CHECK-NEXT: 210014: {{.*}} nop
+# CHECK-NEXT: 210018: {{.*}} nop
# CHECK: _dah:
-# CHECK-NEXT: 2001c: {{.*}} nop
-# CHECK-NEXT: 20020: {{.*}} nop
+# CHECK-NEXT: 21001c: {{.*}} nop
+# CHECK-NEXT: 210020: {{.*}} nop
# CHECK: _start:
-# CHECK-NEXT: 20024: {{.*}} b.eq #-36
-# CHECK-NEXT: 20028: {{.*}} b.eq #-24
-# CHECK-NEXT: 2002c: {{.*}} b.eq #-16
+# CHECK-NEXT: 210024: {{.*}} b.eq #-36
+# CHECK-NEXT: 210028: {{.*}} b.eq #-24
+# CHECK-NEXT: 21002c: {{.*}} b.eq #-16
#DSOREL: Section {
#DSOREL: Index:
Modified: lld/trunk/test/ELF/aarch64-copy.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-copy.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-copy.s (original)
+++ lld/trunk/test/ELF/aarch64-copy.s Fri Sep 21 09:58:13 2018
@@ -22,7 +22,7 @@ _start:
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x40000
+// CHECK-NEXT: Address: 0x230000
// CHECK-NEXT: Offset:
// CHECK-NEXT: Size: 24
// CHECK-NEXT: Link:
@@ -32,19 +32,19 @@ _start:
// CHECK: Relocations [
// CHECK-NEXT: Section ({{.*}}) .rela.dyn {
// CHECK-NEXT: Relocation {
-// CHECK-NEXT: Offset: 0x40000
+// CHECK-NEXT: Offset: 0x230000
// CHECK-NEXT: Type: R_AARCH64_COPY
// CHECK-NEXT: Symbol: x
// CHECK-NEXT: Addend: 0x0
// CHECK-NEXT: }
// CHECK-NEXT: Relocation {
-// CHECK-NEXT: Offset: 0x40010
+// CHECK-NEXT: Offset: 0x230010
// CHECK-NEXT: Type: R_AARCH64_COPY
// CHECK-NEXT: Symbol: y
// CHECK-NEXT: Addend: 0x0
// CHECK-NEXT: }
// CHECK-NEXT: Relocation {
-// CHECK-NEXT: Offset: 0x40014
+// CHECK-NEXT: Offset: 0x230014
// CHECK-NEXT: Type: R_AARCH64_COPY
// CHECK-NEXT: Symbol: z
// CHECK-NEXT: Addend: 0x0
@@ -54,21 +54,21 @@ _start:
// CHECK: Symbols [
// CHECK: Name: x
-// CHECK-NEXT: Value: 0x40000
+// CHECK-NEXT: Value: 0x230000
// CHECK-NEXT: Size: 4
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
// CHECK-NEXT: Other:
// CHECK-NEXT: Section: .bss
// CHECK: Name: y
-// CHECK-NEXT: Value: 0x40010
+// CHECK-NEXT: Value: 0x230010
// CHECK-NEXT: Size: 4
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
// CHECK-NEXT: Other:
// CHECK-NEXT: Section: .bss
// CHECK: Name: z
-// CHECK-NEXT: Value: 0x40014
+// CHECK-NEXT: Value: 0x230014
// CHECK-NEXT: Size: 4
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
@@ -78,16 +78,16 @@ _start:
// CODE: Disassembly of section .text:
// CODE-NEXT: _start:
-// S(x) = 0x40000, A = 0, P = 0x20000
+// S(x) = 0x230000, A = 0, P = 0x210000
// S + A - P = 0x20000 = 131072
-// CODE-NEXT: 20000: {{.*}} adr x1, #131072
-// S(y) = 0x40010, A = 0, P = 0x20004
-// Page(S + A) - Page(P) = 0x40000 - 0x20000 = 0x20000 = 131072
-// CODE-NEXT: 20004: {{.*}} adrp x2, #131072
-// S(y) = 0x40010, A = 0
+// CODE-NEXT: 210000: {{.*}} adr x1, #131072
+// S(y) = 0x230010, A = 0, P = 0x210004
+// Page(S + A) - Page(P) = 0x230000 - 0x210000 = 0x20000 = 131072
+// CODE-NEXT: 210004: {{.*}} adrp x2, #131072
+// S(y) = 0x230010, A = 0
// (S + A) & 0xFFF = 0x10 = 16
-// CODE-NEXT: 20008: {{.*}} add x2, x2, #16
+// CODE-NEXT: 210008: {{.*}} add x2, x2, #16
// RODATA: Contents of section .rodata:
-// S(z) = 0x40014
-// RODATA-NEXT: 102e0 14000400
+// S(z) = 0x230014
+// RODATA-NEXT: 2002e0 14002300
Modified: lld/trunk/test/ELF/aarch64-copy2.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-copy2.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-copy2.s (original)
+++ lld/trunk/test/ELF/aarch64-copy2.s Fri Sep 21 09:58:13 2018
@@ -19,7 +19,7 @@ _start:
// CHECK-NEXT: Section: Undefined
// CHECK: Name: foo
-// CHECK-NEXT: Value: 0x20030
+// CHECK-NEXT: Value: 0x210030
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Function
Modified: lld/trunk/test/ELF/aarch64-cortex-a53-843419-large.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-cortex-a53-843419-large.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-cortex-a53-843419-large.s (original)
+++ lld/trunk/test/ELF/aarch64-cortex-a53-843419-large.s Fri Sep 21 09:58:13 2018
@@ -1,23 +1,23 @@
// REQUIRES: aarch64
// RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux %s -o %t.o
// RUN: ld.lld --fix-cortex-a53-843419 %t.o -o %t2
-// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=131072 -stop-address=131084 | FileCheck --check-prefix=CHECK1 %s
-// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=135168 -stop-address=135172 | FileCheck --check-prefix=CHECK2 %s
-// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=139256 -stop-address=139272 | FileCheck --check-prefix=CHECK3 %s
-// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=67256312 -stop-address=67256328 | FileCheck --check-prefix=CHECK4 %s
-// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=100810760 -stop-address=100810776 | FileCheck --check-prefix=CHECK5 %s
-// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=134352908 -stop-address=134352912 | FileCheck --check-prefix=CHECK6 %s
-// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=134356988 -stop-address=134357012 | FileCheck --check-prefix=CHECK7 %s
+// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=2162688 -stop-address=2162700 | FileCheck --check-prefix=CHECK1 %s
+// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=2166784 -stop-address=2166788 | FileCheck --check-prefix=CHECK2 %s
+// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=2170872 -stop-address=2170888 | FileCheck --check-prefix=CHECK3 %s
+// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=69287928 -stop-address=69287944 | FileCheck --check-prefix=CHECK4 %s
+// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=102842376 -stop-address=102842392 | FileCheck --check-prefix=CHECK5 %s
+// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=136384524 -stop-address=136384528 | FileCheck --check-prefix=CHECK6 %s
+// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=136388604 -stop-address=136388628 | FileCheck --check-prefix=CHECK7 %s
// Test case for Cortex-A53 Erratum 843419 in an OutputSection exceeding
// the maximum branch range. Both range extension thunks and patches are
-// required.
-
+// required.
+
// CHECK1: __AArch64AbsLongThunk_need_thunk_after_patch:
-// CHECK1-NEXT: 20000: 50 00 00 58 ldr x16, #8
-// CHECK1-NEXT: 20004: 00 02 1f d6 br x16
-// CHECK1: $d:
-// CHECK1-NEXT: 20008: 0c 10 02 08 .word 0x0802100c
-
+// CHECK1-NEXT: 210000: 50 00 00 58 ldr x16, #8
+// CHECK1-NEXT: 210004: 00 02 1f d6 br x16
+// CHECK1: $d:
+// CHECK1-NEXT: 210008: 0c 10 21 08 .word 0x0821100c
+
.section .text.01, "ax", %progbits
.balign 4096
.globl _start
@@ -29,7 +29,7 @@ _start:
.space 4096 - 12
// CHECK2: _start:
-// CHECK2-NEXT: 21000: 00 fc ff 97 bl #-4096
+// CHECK2-NEXT: 211000: 00 fc ff 97 bl #-4096
// Expect patch on pass 1
.section .text.03, "ax", %progbits
@@ -42,10 +42,10 @@ t3_ff8_ldr:
ret
// CHECK3: t3_ff8_ldr:
-// CHECK3-NEXT: 21ff8: 60 00 04 f0 adrp x0, #134279168
-// CHECK3-NEXT: 21ffc: 21 00 40 f9 ldr x1, [x1]
-// CHECK3-NEXT: 22000: 02 08 80 15 b #100671496
-// CHECK3-NEXT: 22004: c0 03 5f d6 ret
+// CHECK3-NEXT: 211ff8: 60 00 04 f0 adrp x0, #134279168
+// CHECK3-NEXT: 211ffc: 21 00 40 f9 ldr x1, [x1]
+// CHECK3-NEXT: 212000: 02 08 80 15 b #100671496
+// CHECK3-NEXT: 212004: c0 03 5f d6 ret
.section .text.04, "ax", %progbits
.space 64 * 1024 * 1024
@@ -63,20 +63,20 @@ t3_ff8_str:
ret
// CHECK4: t3_ff8_str:
-// CHECK4-NEXT: 4023ff8: 60 00 02 b0 adrp x0, #67162112
-// CHECK4-NEXT: 4023ffc: 21 00 40 f9 ldr x1, [x1]
-// CHECK4-NEXT: 4024000: 04 00 80 14 b #33554448
-// CHECK4-NEXT: 4024004: c0 03 5f d6 ret
+// CHECK4-NEXT: 4213ff8: 60 00 02 b0 adrp x0, #67162112
+// CHECK4-NEXT: 4213ffc: 21 00 40 f9 ldr x1, [x1]
+// CHECK4-NEXT: 4214000: 04 00 80 14 b #33554448
+// CHECK4-NEXT: 4214004: c0 03 5f d6 ret
.section .text.06, "ax", %progbits
.space 32 * 1024 * 1024
-// CHECK5: __CortexA53843419_21000:
-// CHECK5-NEXT: 6024008: 00 00 40 f9 ldr x0, [x0]
-// CHECK5-NEXT: 602400c: fe f7 7f 16 b #-100671496
-// CHECK5: __CortexA53843419_4023000:
-// CHECK5-NEXT: 6024010: 00 00 00 f9 str x0, [x0]
-// CHECK5-NEXT: 6024014: fc ff 7f 17 b #-33554448
+// CHECK5: __CortexA53843419_211000:
+// CHECK5-NEXT: 6214008: 00 00 40 f9 ldr x0, [x0]
+// CHECK5-NEXT: 621400c: fe f7 7f 16 b #-100671496
+// CHECK5: __CortexA53843419_4213000:
+// CHECK5-NEXT: 6214010: 00 00 00 f9 str x0, [x0]
+// CHECK5-NEXT: 6214014: fc ff 7f 17 b #-33554448
.section .text.07, "ax", %progbits
.space (32 * 1024 * 1024) - 12300
@@ -88,7 +88,7 @@ need_thunk_after_patch:
ret
// CHECK6: need_thunk_after_patch:
-// CHECK6-NEXT: 802100c: c0 03 5f d6 ret
+// CHECK6-NEXT: 821100c: c0 03 5f d6 ret
// Will need a patch on pass 2
.section .text.09, "ax", %progbits
@@ -102,13 +102,13 @@ t3_ffc_ldr:
ret
// CHECK7: t3_ffc_ldr:
-// CHECK7-NEXT: 8021ffc: 60 00 00 f0 adrp x0, #61440
-// CHECK7-NEXT: 8022000: 21 00 40 f9 ldr x1, [x1]
-// CHECK7-NEXT: 8022004: 02 00 00 14 b #8
-// CHECK7-NEXT: 8022008: c0 03 5f d6 ret
-// CHECK7: __CortexA53843419_8022004:
-// CHECK7-NEXT: 802200c: 00 00 40 f9 ldr x0, [x0]
-// CHECK7-NEXT: 8022010: fe ff ff 17 b #-8
+// CHECK7-NEXT: 8211ffc: 60 00 00 f0 adrp x0, #61440
+// CHECK7-NEXT: 8212000: 21 00 40 f9 ldr x1, [x1]
+// CHECK7-NEXT: 8212004: 02 00 00 14 b #8
+// CHECK7-NEXT: 8212008: c0 03 5f d6 ret
+// CHECK7: __CortexA53843419_8212004:
+// CHECK7-NEXT: 821200c: 00 00 40 f9 ldr x0, [x0]
+// CHECK7-NEXT: 8212010: fe ff ff 17 b #-8
.section .data
.globl dat
Modified: lld/trunk/test/ELF/aarch64-cortex-a53-843419-recognize.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-cortex-a53-843419-recognize.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-cortex-a53-843419-recognize.s (original)
+++ lld/trunk/test/ELF/aarch64-cortex-a53-843419-recognize.s Fri Sep 21 09:58:13 2018
@@ -26,13 +26,13 @@
// - Optional instruction 3 present or not.
// - Load or store for instruction 4.
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 21FF8 in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 211FF8 in unpatched output.
// CHECK: t3_ff8_ldr:
-// CHECK-NEXT: 21ff8: e0 01 00 f0 adrp x0, #258048
-// CHECK-NEXT: 21ffc: 21 00 40 f9 ldr x1, [x1]
-// CHECK-FIX: 22000: 03 c8 00 14 b #204812
-// CHECK-NOFIX: 22000: 00 00 40 f9 ldr x0, [x0]
-// CHECK-NEXT: 22004: c0 03 5f d6 ret
+// CHECK-NEXT: 211ff8: e0 01 00 f0 adrp x0, #258048
+// CHECK-NEXT: 211ffc: 21 00 40 f9 ldr x1, [x1]
+// CHECK-FIX: 212000: 03 c8 00 14 b #204812
+// CHECK-NOFIX: 212000: 00 00 40 f9 ldr x0, [x0]
+// CHECK-NEXT: 212004: c0 03 5f d6 ret
.section .text.01, "ax", %progbits
.balign 4096
.globl t3_ff8_ldr
@@ -44,13 +44,13 @@ t3_ff8_ldr:
ldr x0, [x0, :got_lo12:dat1]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 23FF8 in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 213FF8 in unpatched output.
// CHECK: t3_ff8_ldrsimd:
-// CHECK-NEXT: 23ff8: e0 01 00 b0 adrp x0, #249856
-// CHECK-NEXT: 23ffc: 21 00 40 bd ldr s1, [x1]
-// CHECK-FIX: 24000: 05 c0 00 14 b #196628
-// CHECK-NOFIX: 24000: 02 04 40 f9 ldr x2, [x0, #8]
-// CHECK-NEXT: 24004: c0 03 5f d6 ret
+// CHECK-NEXT: 213ff8: e0 01 00 b0 adrp x0, #249856
+// CHECK-NEXT: 213ffc: 21 00 40 bd ldr s1, [x1]
+// CHECK-FIX: 214000: 05 c0 00 14 b #196628
+// CHECK-NOFIX: 214000: 02 04 40 f9 ldr x2, [x0, #8]
+// CHECK-NEXT: 214004: c0 03 5f d6 ret
.section .text.02, "ax", %progbits
.balign 4096
.globl t3_ff8_ldrsimd
@@ -62,13 +62,13 @@ t3_ff8_ldrsimd:
ldr x2, [x0, :got_lo12:dat2]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 25FFC in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 215FFC in unpatched output.
// CHECK: t3_ffc_ldrpost:
-// CHECK-NEXT: 25ffc: c0 01 00 f0 adrp x0, #241664
-// CHECK-NEXT: 26000: 21 84 40 bc ldr s1, [x1], #8
-// CHECK-FIX: 26004: 06 b8 00 14 b #188440
-// CHECK-NOFIX: 26004: 03 08 40 f9 ldr x3, [x0, #16]
-// CHECK-NEXT: 26008: c0 03 5f d6 ret
+// CHECK-NEXT: 215ffc: c0 01 00 f0 adrp x0, #241664
+// CHECK-NEXT: 216000: 21 84 40 bc ldr s1, [x1], #8
+// CHECK-FIX: 216004: 06 b8 00 14 b #188440
+// CHECK-NOFIX: 216004: 03 08 40 f9 ldr x3, [x0, #16]
+// CHECK-NEXT: 216008: c0 03 5f d6 ret
.section .text.03, "ax", %progbits
.balign 4096
.globl t3_ffc_ldrpost
@@ -80,13 +80,13 @@ t3_ffc_ldrpost:
ldr x3, [x0, :got_lo12:dat3]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 27FF8 in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 217FF8 in unpatched output.
// CHECK: t3_ff8_strpre:
-// CHECK-NEXT: 27ff8: c0 01 00 b0 adrp x0, #233472
-// CHECK-NEXT: 27ffc: 21 8c 00 bc str s1, [x1, #8]!
-// CHECK-FIX: 28000: 09 b0 00 14 b #180260
-// CHECK-NOFIX: 28000: 02 00 40 f9 ldr x2, [x0]
-// CHECK-NEXT: 28004: c0 03 5f d6 ret
+// CHECK-NEXT: 217ff8: c0 01 00 b0 adrp x0, #233472
+// CHECK-NEXT: 217ffc: 21 8c 00 bc str s1, [x1, #8]!
+// CHECK-FIX: 218000: 09 b0 00 14 b #180260
+// CHECK-NOFIX: 218000: 02 00 40 f9 ldr x2, [x0]
+// CHECK-NEXT: 218004: c0 03 5f d6 ret
.section .text.04, "ax", %progbits
.balign 4096
.globl t3_ff8_strpre
@@ -98,13 +98,13 @@ t3_ff8_strpre:
ldr x2, [x0, :lo12:dat1]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 29FFC in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 219FFC in unpatched output.
// CHECK: t3_ffc_str:
-// CHECK-NEXT: 29ffc: bc 01 00 f0 adrp x28, #225280
-// CHECK-NEXT: 2a000: 42 00 00 f9 str x2, [x2]
-// CHECK-FIX: 2a004: 0a a8 00 14 b #172072
-// CHECK-NOFIX: 2a004: 9c 07 00 f9 str x28, [x28, #8]
-// CHECK-NEXT: 2a008: c0 03 5f d6 ret
+// CHECK-NEXT: 219ffc: bc 01 00 f0 adrp x28, #225280
+// CHECK-NEXT: 21a000: 42 00 00 f9 str x2, [x2]
+// CHECK-FIX: 21a004: 0a a8 00 14 b #172072
+// CHECK-NOFIX: 21a004: 9c 07 00 f9 str x28, [x28, #8]
+// CHECK-NEXT: 21a008: c0 03 5f d6 ret
.section .text.05, "ax", %progbits
.balign 4096
.globl t3_ffc_str
@@ -116,13 +116,13 @@ t3_ffc_str:
str x28, [x28, :lo12:dat2]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 2BFFC in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 21BFFC in unpatched output.
// CHECK: t3_ffc_strsimd:
-// CHECK-NEXT: 2bffc: bc 01 00 b0 adrp x28, #217088
-// CHECK-NEXT: 2c000: 44 00 00 b9 str w4, [x2]
-// CHECK-FIX: 2c004: 0c a0 00 14 b #163888
-// CHECK-NOFIX: 2c004: 84 0b 00 f9 str x4, [x28, #16]
-// CHECK-NEXT: 2c008: c0 03 5f d6 ret
+// CHECK-NEXT: 21bffc: bc 01 00 b0 adrp x28, #217088
+// CHECK-NEXT: 21c000: 44 00 00 b9 str w4, [x2]
+// CHECK-FIX: 21c004: 0c a0 00 14 b #163888
+// CHECK-NOFIX: 21c004: 84 0b 00 f9 str x4, [x28, #16]
+// CHECK-NEXT: 21c008: c0 03 5f d6 ret
.section .text.06, "ax", %progbits
.balign 4096
.globl t3_ffc_strsimd
@@ -134,13 +134,13 @@ t3_ffc_strsimd:
str x4, [x28, :lo12:dat3]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 2DFF8 in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 21DFF8 in unpatched output.
// CHECK: t3_ff8_ldrunpriv:
-// CHECK-NEXT: 2dff8: 9d 01 00 f0 adrp x29, #208896
-// CHECK-NEXT: 2dffc: 41 08 40 38 ldtrb w1, [x2]
-// CHECK-FIX: 2e000: 0f 98 00 14 b #155708
-// CHECK-NOFIX: 2e000: bd 03 40 f9 ldr x29, [x29]
-// CHECK-NEXT: 2e004: c0 03 5f d6 ret
+// CHECK-NEXT: 21dff8: 9d 01 00 f0 adrp x29, #208896
+// CHECK-NEXT: 21dffc: 41 08 40 38 ldtrb w1, [x2]
+// CHECK-FIX: 21e000: 0f 98 00 14 b #155708
+// CHECK-NOFIX: 21e000: bd 03 40 f9 ldr x29, [x29]
+// CHECK-NEXT: 21e004: c0 03 5f d6 ret
.section .text.07, "ax", %progbits
.balign 4096
.globl t3_ff8_ldrunpriv
@@ -152,13 +152,13 @@ t3_ff8_ldrunpriv:
ldr x29, [x29, :got_lo12:dat1]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 2FFFC in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 21FFFC in unpatched output.
// CHECK: t3_ffc_ldur:
-// CHECK-NEXT: 2fffc: 9d 01 00 b0 adrp x29, #200704
-// CHECK-NEXT: 30000: 42 40 40 b8 ldur w2, [x2, #4]
-// CHECK-FIX: 30004: 10 90 00 14 b #147520
-// CHECK-NOFIX: 30004: bd 07 40 f9 ldr x29, [x29, #8]
-// CHECK-NEXT: 30008: c0 03 5f d6 ret
+// CHECK-NEXT: 21fffc: 9d 01 00 b0 adrp x29, #200704
+// CHECK-NEXT: 220000: 42 40 40 b8 ldur w2, [x2, #4]
+// CHECK-FIX: 220004: 10 90 00 14 b #147520
+// CHECK-NOFIX: 220004: bd 07 40 f9 ldr x29, [x29, #8]
+// CHECK-NEXT: 220008: c0 03 5f d6 ret
.balign 4096
.globl t3_ffc_ldur
.type t3_ffc_ldur, %function
@@ -169,13 +169,13 @@ t3_ffc_ldur:
ldr x29, [x29, :got_lo12:dat2]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 31FFC in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 221FFC in unpatched output.
// CHECK: t3_ffc_sturh:
-// CHECK-NEXT: 31ffc: 72 01 00 f0 adrp x18, #192512
-// CHECK-NEXT: 32000: 43 40 00 78 sturh w3, [x2, #4]
-// CHECK-FIX: 32004: 12 88 00 14 b #139336
-// CHECK-NOFIX: 32004: 41 0a 40 f9 ldr x1, [x18, #16]
-// CHECK-NEXT: 32008: c0 03 5f d6 ret
+// CHECK-NEXT: 221ffc: 72 01 00 f0 adrp x18, #192512
+// CHECK-NEXT: 222000: 43 40 00 78 sturh w3, [x2, #4]
+// CHECK-FIX: 222004: 12 88 00 14 b #139336
+// CHECK-NOFIX: 222004: 41 0a 40 f9 ldr x1, [x18, #16]
+// CHECK-NEXT: 222008: c0 03 5f d6 ret
.section .text.09, "ax", %progbits
.balign 4096
.globl t3_ffc_sturh
@@ -187,13 +187,13 @@ t3_ffc_sturh:
ldr x1, [x18, :got_lo12:dat3]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 33FF8 in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 223FF8 in unpatched output.
// CHECK: t3_ff8_literal:
-// CHECK-NEXT: 33ff8: 72 01 00 b0 adrp x18, #184320
-// CHECK-NEXT: 33ffc: e3 ff ff 58 ldr x3, #-4
-// CHECK-FIX: 34000: 15 80 00 14 b #131156
-// CHECK-NOFIX: 34000: 52 02 40 f9 ldr x18, [x18]
-// CHECK-NEXT: 34004: c0 03 5f d6 ret
+// CHECK-NEXT: 223ff8: 72 01 00 b0 adrp x18, #184320
+// CHECK-NEXT: 223ffc: e3 ff ff 58 ldr x3, #-4
+// CHECK-FIX: 224000: 15 80 00 14 b #131156
+// CHECK-NOFIX: 224000: 52 02 40 f9 ldr x18, [x18]
+// CHECK-NEXT: 224004: c0 03 5f d6 ret
.section .text.10, "ax", %progbits
.balign 4096
.globl t3_ff8_literal
@@ -205,13 +205,13 @@ t3_ff8_literal:
ldr x18, [x18, :lo12:dat1]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 35FFC in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 225FFC in unpatched output.
// CHECK: t3_ffc_register:
-// CHECK-NEXT: 35ffc: 4f 01 00 f0 adrp x15, #176128
-// CHECK-NEXT: 36000: 43 68 61 f8 ldr x3, [x2, x1]
-// CHECK-FIX: 36004: 16 78 00 14 b #122968
-// CHECK-NOFIX: 36004: ea 05 40 f9 ldr x10, [x15, #8]
-// CHECK-NEXT: 36008: c0 03 5f d6 ret
+// CHECK-NEXT: 225ffc: 4f 01 00 f0 adrp x15, #176128
+// CHECK-NEXT: 226000: 43 68 61 f8 ldr x3, [x2, x1]
+// CHECK-FIX: 226004: 16 78 00 14 b #122968
+// CHECK-NOFIX: 226004: ea 05 40 f9 ldr x10, [x15, #8]
+// CHECK-NEXT: 226008: c0 03 5f d6 ret
.section .text.11, "ax", %progbits
.balign 4096
.globl t3_ffc_register
@@ -223,13 +223,13 @@ t3_ffc_register:
ldr x10, [x15, :lo12:dat2]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 37FF8 in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 227FF8 in unpatched output.
// CHECK: t3_ff8_stp:
-// CHECK-NEXT: 37ff8: 50 01 00 b0 adrp x16, #167936
-// CHECK-NEXT: 37ffc: 61 08 00 a9 stp x1, x2, [x3]
-// CHECK-FIX: 38000: 19 70 00 14 b #114788
-// CHECK-NOFIX: 38000: 0d 0a 40 f9 ldr x13, [x16, #16]
-// CHECK-NEXT: 38004: c0 03 5f d6 ret
+// CHECK-NEXT: 227ff8: 50 01 00 b0 adrp x16, #167936
+// CHECK-NEXT: 227ffc: 61 08 00 a9 stp x1, x2, [x3]
+// CHECK-FIX: 228000: 19 70 00 14 b #114788
+// CHECK-NOFIX: 228000: 0d 0a 40 f9 ldr x13, [x16, #16]
+// CHECK-NEXT: 228004: c0 03 5f d6 ret
.section .text.12, "ax", %progbits
.balign 4096
.globl t3_ff8_stp
@@ -241,13 +241,13 @@ t3_ff8_stp:
ldr x13, [x16, :lo12:dat3]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 39FFC in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 229FFC in unpatched output.
// CHECK: t3_ffc_stnp:
-// CHECK-NEXT: 39ffc: 27 01 00 f0 adrp x7, #159744
-// CHECK-NEXT: 3a000: 61 08 00 a8 stnp x1, x2, [x3]
-// CHECK-FIX: 3a004: 1a 68 00 14 b #106600
-// CHECK-NOFIX: 3a004: e9 00 40 f9 ldr x9, [x7]
-// CHECK-NEXT: 3a008: c0 03 5f d6 ret
+// CHECK-NEXT: 229ffc: 27 01 00 f0 adrp x7, #159744
+// CHECK-NEXT: 22a000: 61 08 00 a8 stnp x1, x2, [x3]
+// CHECK-FIX: 22a004: 1a 68 00 14 b #106600
+// CHECK-NOFIX: 22a004: e9 00 40 f9 ldr x9, [x7]
+// CHECK-NEXT: 22a008: c0 03 5f d6 ret
.section .text.13, "ax", %progbits
.balign 4096
.globl t3_ffc_stnp
@@ -259,13 +259,13 @@ t3_ffc_stnp:
ldr x9, [x7, :lo12:dat1]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 3BFFC in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 22BFFC in unpatched output.
// CHECK: t3_ffc_st1singlepost:
-// CHECK-NEXT: 3bffc: 37 01 00 b0 adrp x23, #151552
-// CHECK-NEXT: 3c000: 20 04 82 0d st1 { v0.b }[1], [x1], x2
-// CHECK-FIX: 3c004: 1c 60 00 14 b #98416
-// CHECK-NOFIX: 3c004: f6 06 40 f9 ldr x22, [x23, #8]
-// CHECK-NEXT: 3c008: c0 03 5f d6 ret
+// CHECK-NEXT: 22bffc: 37 01 00 b0 adrp x23, #151552
+// CHECK-NEXT: 22c000: 20 04 82 0d st1 { v0.b }[1], [x1], x2
+// CHECK-FIX: 22c004: 1c 60 00 14 b #98416
+// CHECK-NOFIX: 22c004: f6 06 40 f9 ldr x22, [x23, #8]
+// CHECK-NEXT: 22c008: c0 03 5f d6 ret
.section .text.14, "ax", %progbits
.balign 4096
.globl t3_ffc_st1singlepost
@@ -277,13 +277,13 @@ t3_ffc_st1singlepost:
ldr x22, [x23, :lo12:dat2]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 3DFF8 in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 22DFF8 in unpatched output.
// CHECK: t3_ff8_st1multiple:
-// CHECK-NEXT: 3dff8: 17 01 00 f0 adrp x23, #143360
-// CHECK-NEXT: 3dffc: 20 a0 00 4c st1 { v0.16b, v1.16b }, [x1]
-// CHECK-FIX: 3e000: 1f 58 00 14 b #90236
-// CHECK-NOFIX: 3e000: f8 0a 40 f9 ldr x24, [x23, #16]
-// CHECK-NEXT: 3e004: c0 03 5f d6 ret
+// CHECK-NEXT: 22dff8: 17 01 00 f0 adrp x23, #143360
+// CHECK-NEXT: 22dffc: 20 a0 00 4c st1 { v0.16b, v1.16b }, [x1]
+// CHECK-FIX: 22e000: 1f 58 00 14 b #90236
+// CHECK-NOFIX: 22e000: f8 0a 40 f9 ldr x24, [x23, #16]
+// CHECK-NEXT: 22e004: c0 03 5f d6 ret
.section .text.15, "ax", %progbits
.balign 4096
.globl t3_ff8_st1multiple
@@ -295,14 +295,14 @@ t3_ff8_st1multiple:
ldr x24, [x23, :lo12:dat3]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 3FFF8 in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 22FFF8 in unpatched output.
// CHECK: t4_ff8_ldr:
-// CHECK-NEXT: 3fff8: 00 01 00 b0 adrp x0, #135168
-// CHECK-NEXT: 3fffc: 21 00 40 f9 ldr x1, [x1]
-// CHECK-NEXT: 40000: 42 00 00 8b add x2, x2, x0
-// CHECK-FIX: 40004: 20 50 00 14 b #82048
-// CHECK-NOFIX: 40004: 02 00 40 f9 ldr x2, [x0]
-// CHECK-NEXT: 40008: c0 03 5f d6 ret
+// CHECK-NEXT: 22fff8: 00 01 00 b0 adrp x0, #135168
+// CHECK-NEXT: 22fffc: 21 00 40 f9 ldr x1, [x1]
+// CHECK-NEXT: 230000: 42 00 00 8b add x2, x2, x0
+// CHECK-FIX: 230004: 20 50 00 14 b #82048
+// CHECK-NOFIX: 230004: 02 00 40 f9 ldr x2, [x0]
+// CHECK-NEXT: 230008: c0 03 5f d6 ret
.section .text.16, "ax", %progbits
.balign 4096
.globl t4_ff8_ldr
@@ -315,14 +315,14 @@ t4_ff8_ldr:
ldr x2, [x0, :got_lo12:dat1]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 41FFC in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 231FFC in unpatched output.
// CHECK: t4_ffc_str:
-// CHECK-NEXT: 41ffc: fc 00 00 f0 adrp x28, #126976
-// CHECK-NEXT: 42000: 42 00 00 f9 str x2, [x2]
-// CHECK-NEXT: 42004: 20 00 02 cb sub x0, x1, x2
-// CHECK-FIX: 42008: 21 48 00 14 b #73860
-// CHECK-NOFIX: 42008: 9b 07 00 f9 str x27, [x28, #8]
-// CHECK-NEXT: 4200c: c0 03 5f d6 ret
+// CHECK-NEXT: 231ffc: fc 00 00 f0 adrp x28, #126976
+// CHECK-NEXT: 232000: 42 00 00 f9 str x2, [x2]
+// CHECK-NEXT: 232004: 20 00 02 cb sub x0, x1, x2
+// CHECK-FIX: 232008: 21 48 00 14 b #73860
+// CHECK-NOFIX: 232008: 9b 07 00 f9 str x27, [x28, #8]
+// CHECK-NEXT: 23200c: c0 03 5f d6 ret
.section .text.17, "ax", %progbits
.balign 4096
.globl t4_ffc_str
@@ -335,14 +335,14 @@ t4_ffc_str:
str x27, [x28, :got_lo12:dat2]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 43FF8 in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 233FF8 in unpatched output.
// CHECK: t4_ff8_stp:
-// CHECK-NEXT: 43ff8: f0 00 00 b0 adrp x16, #118784
-// CHECK-NEXT: 43ffc: 61 08 00 a9 stp x1, x2, [x3]
-// CHECK-NEXT: 44000: 03 7e 10 9b mul x3, x16, x16
-// CHECK-FIX: 44004: 24 40 00 14 b #65680
-// CHECK-NOFIX: 44004: 0e 0a 40 f9 ldr x14, [x16, #16]
-// CHECK-NEXT: 44008: c0 03 5f d6 ret
+// CHECK-NEXT: 233ff8: f0 00 00 b0 adrp x16, #118784
+// CHECK-NEXT: 233ffc: 61 08 00 a9 stp x1, x2, [x3]
+// CHECK-NEXT: 234000: 03 7e 10 9b mul x3, x16, x16
+// CHECK-FIX: 234004: 24 40 00 14 b #65680
+// CHECK-NOFIX: 234004: 0e 0a 40 f9 ldr x14, [x16, #16]
+// CHECK-NEXT: 234008: c0 03 5f d6 ret
.section .text.18, "ax", %progbits
.balign 4096
.globl t4_ff8_stp
@@ -355,14 +355,14 @@ t4_ff8_stp:
ldr x14, [x16, :got_lo12:dat3]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 45FF8 in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 235FF8 in unpatched output.
// CHECK: t4_ff8_stppre:
-// CHECK-NEXT: 45ff8: d0 00 00 f0 adrp x16, #110592
-// CHECK-NEXT: 45ffc: 61 08 81 a9 stp x1, x2, [x3, #16]!
-// CHECK-NEXT: 46000: 03 7e 10 9b mul x3, x16, x16
-// CHECK-FIX: 46004: 26 38 00 14 b #57496
-// CHECK-NOFIX: 46004: 0e 06 40 f9 ldr x14, [x16, #8]
-// CHECK-NEXT: 46008: c0 03 5f d6 ret
+// CHECK-NEXT: 235ff8: d0 00 00 f0 adrp x16, #110592
+// CHECK-NEXT: 235ffc: 61 08 81 a9 stp x1, x2, [x3, #16]!
+// CHECK-NEXT: 236000: 03 7e 10 9b mul x3, x16, x16
+// CHECK-FIX: 236004: 26 38 00 14 b #57496
+// CHECK-NOFIX: 236004: 0e 06 40 f9 ldr x14, [x16, #8]
+// CHECK-NEXT: 236008: c0 03 5f d6 ret
.section .text.19, "ax", %progbits
.balign 4096
.globl t4_ff8_stppre
@@ -375,14 +375,14 @@ t4_ff8_stppre:
ldr x14, [x16, #8]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 47FF8 in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 237FF8 in unpatched output.
// CHECK: t4_ff8_stppost:
-// CHECK-NEXT: 47ff8: d0 00 00 b0 adrp x16, #102400
-// CHECK-NEXT: 47ffc: 61 08 81 a8 stp x1, x2, [x3], #16
-// CHECK-NEXT: 48000: 03 7e 10 9b mul x3, x16, x16
-// CHECK-FIX: 48004: 28 30 00 14 b #49312
-// CHECK-NOFIX: 48004: 0e 06 40 f9 ldr x14, [x16, #8]
-// CHECK-NEXT: 48008: c0 03 5f d6 ret
+// CHECK-NEXT: 237ff8: d0 00 00 b0 adrp x16, #102400
+// CHECK-NEXT: 237ffc: 61 08 81 a8 stp x1, x2, [x3], #16
+// CHECK-NEXT: 238000: 03 7e 10 9b mul x3, x16, x16
+// CHECK-FIX: 238004: 28 30 00 14 b #49312
+// CHECK-NOFIX: 238004: 0e 06 40 f9 ldr x14, [x16, #8]
+// CHECK-NEXT: 238008: c0 03 5f d6 ret
.section .text.20, "ax", %progbits
.balign 4096
.globl t4_ff8_stppost
@@ -395,14 +395,14 @@ t4_ff8_stppost:
ldr x14, [x16, #8]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 49FFC in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 239FFC in unpatched output.
// CHECK: t4_ffc_stpsimd:
-// CHECK-NEXT: 49ffc: b0 00 00 f0 adrp x16, #94208
-// CHECK-NEXT: 4a000: 61 08 00 ad stp q1, q2, [x3]
-// CHECK-NEXT: 4a004: 03 7e 10 9b mul x3, x16, x16
-// CHECK-FIX: 4a008: 29 28 00 14 b #41124
-// CHECK-NOFIX: 4a008: 0e 06 40 f9 ldr x14, [x16, #8]
-// CHECK-NEXT: 4a00c: c0 03 5f d6 ret
+// CHECK-NEXT: 239ffc: b0 00 00 f0 adrp x16, #94208
+// CHECK-NEXT: 23a000: 61 08 00 ad stp q1, q2, [x3]
+// CHECK-NEXT: 23a004: 03 7e 10 9b mul x3, x16, x16
+// CHECK-FIX: 23a008: 29 28 00 14 b #41124
+// CHECK-NOFIX: 23a008: 0e 06 40 f9 ldr x14, [x16, #8]
+// CHECK-NEXT: 23a00c: c0 03 5f d6 ret
.section .text.21, "ax", %progbits
.balign 4096
.globl t4_ffc_stpsimd
@@ -415,14 +415,14 @@ t4_ffc_stpsimd:
ldr x14, [x16, #8]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 4BFFC in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 23BFFC in unpatched output.
// CHECK: t4_ffc_stnp:
-// CHECK-NEXT: 4bffc: a7 00 00 b0 adrp x7, #86016
-// CHECK-NEXT: 4c000: 61 08 00 a8 stnp x1, x2, [x3]
-// CHECK-NEXT: 4c004: 1f 20 03 d5 nop
-// CHECK-FIX: 4c008: 2b 20 00 14 b #32940
-// CHECK-NOFIX: 4c008: ea 00 40 f9 ldr x10, [x7]
-// CHECK-NEXT: 4c00c: c0 03 5f d6 ret
+// CHECK-NEXT: 23bffc: a7 00 00 b0 adrp x7, #86016
+// CHECK-NEXT: 23c000: 61 08 00 a8 stnp x1, x2, [x3]
+// CHECK-NEXT: 23c004: 1f 20 03 d5 nop
+// CHECK-FIX: 23c008: 2b 20 00 14 b #32940
+// CHECK-NOFIX: 23c008: ea 00 40 f9 ldr x10, [x7]
+// CHECK-NEXT: 23c00c: c0 03 5f d6 ret
.section .text.22, "ax", %progbits
.balign 4096
.globl t4_ffc_stnp
@@ -435,14 +435,14 @@ t4_ffc_stnp:
ldr x10, [x7, :got_lo12:dat1]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 4DFFC in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 23DFFC in unpatched output.
// CHECK: t4_ffc_st1:
-// CHECK-NEXT: 4dffc: 98 00 00 f0 adrp x24, #77824
-// CHECK-NEXT: 4e000: 20 80 00 4d st1 { v0.s }[2], [x1]
-// CHECK-NEXT: 4e004: f6 06 40 f9 ldr x22, [x23, #8]
-// CHECK-FIX: 4e008: 2d 18 00 14 b #24756
-// CHECK-NOFIX: 4e008: 18 ff 3f f9 str x24, [x24, #32760]
-// CHECK-NEXT: 4e00c: c0 03 5f d6 ret
+// CHECK-NEXT: 23dffc: 98 00 00 f0 adrp x24, #77824
+// CHECK-NEXT: 23e000: 20 80 00 4d st1 { v0.s }[2], [x1]
+// CHECK-NEXT: 23e004: f6 06 40 f9 ldr x22, [x23, #8]
+// CHECK-FIX: 23e008: 2d 18 00 14 b #24756
+// CHECK-NOFIX: 23e008: 18 ff 3f f9 str x24, [x24, #32760]
+// CHECK-NEXT: 23e00c: c0 03 5f d6 ret
.section .text.23, "ax", %progbits
.balign 4096
.globl t4_ffc_st1
@@ -455,14 +455,14 @@ t4_ffc_st1:
str x24, [x24, #32760]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 4FFF8 in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 23FFF8 in unpatched output.
// CHECK: t3_ff8_ldr_once:
-// CHECK-NEXT: 4fff8: 80 00 00 b0 adrp x0, #69632
-// CHECK-NEXT: 4fffc: 20 70 82 4c st1 { v0.16b }, [x1], x2
-// CHECK-FIX: 50000: 31 10 00 14 b #16580
-// CHECK-NOFIX: 50000: 01 08 40 f9 ldr x1, [x0, #16]
-// CHECK-NEXT: 50004: 02 08 40 f9 ldr x2, [x0, #16]
-// CHECK-NEXT: 50008: c0 03 5f d6 ret
+// CHECK-NEXT: 23fff8: 80 00 00 b0 adrp x0, #69632
+// CHECK-NEXT: 23fffc: 20 70 82 4c st1 { v0.16b }, [x1], x2
+// CHECK-FIX: 240000: 31 10 00 14 b #16580
+// CHECK-NOFIX: 240000: 01 08 40 f9 ldr x1, [x0, #16]
+// CHECK-NEXT: 240004: 02 08 40 f9 ldr x2, [x0, #16]
+// CHECK-NEXT: 240008: c0 03 5f d6 ret
.section .text.24, "ax", %progbits
.balign 4096
.globl t3_ff8_ldr_once
@@ -475,14 +475,14 @@ t3_ff8_ldr_once:
ldr x2, [x0, #16]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 51FF8 in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 241FF8 in unpatched output.
// CHECK: t3_ff8_ldxr:
-// CHECK-NEXT: 51ff8: 60 00 00 f0 adrp x0, #61440
-// CHECK-NEXT: 51ffc: 03 7c 5f c8 ldxr x3, [x0]
-// CHECK-FIX: 52000: 33 08 00 14 b #8396
-// CHECK-NOFIX: 52000: 01 08 40 f9 ldr x1, [x0, #16]
-// CHECK: 52004: 02 08 40 f9 ldr x2, [x0, #16]
-// CHECK-NEXT: 52008: c0 03 5f d6 ret
+// CHECK-NEXT: 241ff8: 60 00 00 f0 adrp x0, #61440
+// CHECK-NEXT: 241ffc: 03 7c 5f c8 ldxr x3, [x0]
+// CHECK-FIX: 242000: 33 08 00 14 b #8396
+// CHECK-NOFIX: 242000: 01 08 40 f9 ldr x1, [x0, #16]
+// CHECK: 242004: 02 08 40 f9 ldr x2, [x0, #16]
+// CHECK-NEXT: 242008: c0 03 5f d6 ret
.section .text.25, "ax", %progbits
.balign 4096
.globl t3_ff8_ldxr
@@ -495,14 +495,14 @@ t3_ff8_ldxr:
ldr x2, [x0, #16]
ret
-// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 53FF8 in unpatched output.
+// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 243FF8 in unpatched output.
// CHECK: t3_ff8_stxr:
-// CHECK-NEXT: 53ff8: 60 00 00 b0 adrp x0, #53248
-// CHECK-NEXT: 53ffc: 03 7c 04 c8 stxr w4, x3, [x0]
-// CHECK-FIX: 54000: 35 00 00 14 b #212
-// CHECK-NOFIX: 54000: 01 08 40 f9 ldr x1, [x0, #16]
-// CHECK: 54004: 02 08 40 f9 ldr x2, [x0, #16]
-// CHECK-NEXT: 54008: c0 03 5f d6 ret
+// CHECK-NEXT: 243ff8: 60 00 00 b0 adrp x0, #53248
+// CHECK-NEXT: 243ffc: 03 7c 04 c8 stxr w4, x3, [x0]
+// CHECK-FIX: 244000: 35 00 00 14 b #212
+// CHECK-NOFIX: 244000: 01 08 40 f9 ldr x1, [x0, #16]
+// CHECK: 244004: 02 08 40 f9 ldr x2, [x0, #16]
+// CHECK-NEXT: 244008: c0 03 5f d6 ret
.section .text.26, "ax", %progbits
.balign 4096
.globl t3_ff8_stxr
@@ -521,84 +521,84 @@ t3_ff8_stxr:
_start:
ret
-// CHECK-FIX: __CortexA53843419_22000:
-// CHECK-FIX-NEXT: 5400c: 00 00 40 f9 ldr x0, [x0]
-// CHECK-FIX-NEXT: 54010: fd 37 ff 17 b #-204812
-// CHECK-FIX: __CortexA53843419_24000:
-// CHECK-FIX-NEXT: 54014: 02 04 40 f9 ldr x2, [x0, #8]
-// CHECK-FIX-NEXT: 54018: fb 3f ff 17 b #-196628
-// CHECK-FIX: __CortexA53843419_26004:
-// CHECK-FIX-NEXT: 5401c: 03 08 40 f9 ldr x3, [x0, #16]
-// CHECK-FIX-NEXT: 54020: fa 47 ff 17 b #-188440
-// CHECK-FIX: __CortexA53843419_28000:
-// CHECK-FIX-NEXT: 54024: 02 00 40 f9 ldr x2, [x0]
-// CHECK-FIX-NEXT: 54028: f7 4f ff 17 b #-180260
-// CHECK-FIX: __CortexA53843419_2A004:
-// CHECK-FIX-NEXT: 5402c: 9c 07 00 f9 str x28, [x28, #8]
-// CHECK-FIX-NEXT: 54030: f6 57 ff 17 b #-172072
-// CHECK-FIX: __CortexA53843419_2C004:
-// CHECK-FIX-NEXT: 54034: 84 0b 00 f9 str x4, [x28, #16]
-// CHECK-FIX-NEXT: 54038: f4 5f ff 17 b #-163888
-// CHECK-FIX: __CortexA53843419_2E000:
-// CHECK-FIX-NEXT: 5403c: bd 03 40 f9 ldr x29, [x29]
-// CHECK-FIX-NEXT: 54040: f1 67 ff 17 b #-155708
-// CHECK-FIX: __CortexA53843419_30004:
-// CHECK-FIX-NEXT: 54044: bd 07 40 f9 ldr x29, [x29, #8]
-// CHECK-FIX-NEXT: 54048: f0 6f ff 17 b #-147520
-// CHECK-FIX: __CortexA53843419_32004:
-// CHECK-FIX-NEXT: 5404c: 41 0a 40 f9 ldr x1, [x18, #16]
-// CHECK-FIX-NEXT: 54050: ee 77 ff 17 b #-139336
-// CHECK-FIX: __CortexA53843419_34000:
-// CHECK-FIX-NEXT: 54054: 52 02 40 f9 ldr x18, [x18]
-// CHECK-FIX-NEXT: 54058: eb 7f ff 17 b #-131156
-// CHECK-FIX: __CortexA53843419_36004:
-// CHECK-FIX-NEXT: 5405c: ea 05 40 f9 ldr x10, [x15, #8]
-// CHECK-FIX-NEXT: 54060: ea 87 ff 17 b #-122968
-// CHECK-FIX: __CortexA53843419_38000:
-// CHECK-FIX-NEXT: 54064: 0d 0a 40 f9 ldr x13, [x16, #16]
-// CHECK-FIX-NEXT: 54068: e7 8f ff 17 b #-114788
-// CHECK-FIX: __CortexA53843419_3A004:
-// CHECK-FIX-NEXT: 5406c: e9 00 40 f9 ldr x9, [x7]
-// CHECK-FIX-NEXT: 54070: e6 97 ff 17 b #-106600
-// CHECK-FIX: __CortexA53843419_3C004:
-// CHECK-FIX-NEXT: 54074: f6 06 40 f9 ldr x22, [x23, #8]
-// CHECK-FIX-NEXT: 54078: e4 9f ff 17 b #-98416
-// CHECK-FIX: __CortexA53843419_3E000:
-// CHECK-FIX-NEXT: 5407c: f8 0a 40 f9 ldr x24, [x23, #16]
-// CHECK-FIX-NEXT: 54080: e1 a7 ff 17 b #-90236
-// CHECK-FIX: __CortexA53843419_40004:
-// CHECK-FIX-NEXT: 54084: 02 00 40 f9 ldr x2, [x0]
-// CHECK-FIX-NEXT: 54088: e0 af ff 17 b #-82048
-// CHECK-FIX: __CortexA53843419_42008:
-// CHECK-FIX-NEXT: 5408c: 9b 07 00 f9 str x27, [x28, #8]
-// CHECK-FIX-NEXT: 54090: df b7 ff 17 b #-73860
-// CHECK-FIX: __CortexA53843419_44004:
-// CHECK-FIX-NEXT: 54094: 0e 0a 40 f9 ldr x14, [x16, #16]
-// CHECK-FIX-NEXT: 54098: dc bf ff 17 b #-65680
-// CHECK-FIX: __CortexA53843419_46004:
-// CHECK-FIX-NEXT: 5409c: 0e 06 40 f9 ldr x14, [x16, #8]
-// CHECK-FIX-NEXT: 540a0: da c7 ff 17 b #-57496
-// CHECK-FIX: __CortexA53843419_48004:
-// CHECK-FIX-NEXT: 540a4: 0e 06 40 f9 ldr x14, [x16, #8]
-// CHECK-FIX-NEXT: 540a8: d8 cf ff 17 b #-49312
-// CHECK-FIX: __CortexA53843419_4A008:
-// CHECK-FIX-NEXT: 540ac: 0e 06 40 f9 ldr x14, [x16, #8]
-// CHECK-FIX-NEXT: 540b0: d7 d7 ff 17 b #-41124
-// CHECK-FIX: __CortexA53843419_4C008:
-// CHECK-FIX-NEXT: 540b4: ea 00 40 f9 ldr x10, [x7]
-// CHECK-FIX-NEXT: 540b8: d5 df ff 17 b #-32940
-// CHECK-FIX: __CortexA53843419_4E008:
-// CHECK-FIX-NEXT: 540bc: 18 ff 3f f9 str x24, [x24, #32760]
-// CHECK-FIX-NEXT: 540c0: d3 e7 ff 17 b #-24756
-// CHECK-FIX: __CortexA53843419_50000:
-// CHECK-FIX-NEXT: 540c4: 01 08 40 f9 ldr x1, [x0, #16]
-// CHECK-FIX-NEXT: 540c8: cf ef ff 17 b #-16580
-// CHECK-FIX: __CortexA53843419_52000:
-// CHECK-FIX-NEXT: 540cc: 01 08 40 f9 ldr x1, [x0, #16]
-// CHECK-FIX-NEXT: 540d0: cd f7 ff 17 b #-8396
-// CHECK-FIX: __CortexA53843419_54000:
-// CHECK-FIX-NEXT: 540d4: 01 08 40 f9 ldr x1, [x0, #16]
-// CHECK-FIX-NEXT: 540d8: cb ff ff 17 b #-212
+// CHECK-FIX: __CortexA53843419_212000:
+// CHECK-FIX-NEXT: 24400c: 00 00 40 f9 ldr x0, [x0]
+// CHECK-FIX-NEXT: 244010: fd 37 ff 17 b #-204812
+// CHECK-FIX: __CortexA53843419_214000:
+// CHECK-FIX-NEXT: 244014: 02 04 40 f9 ldr x2, [x0, #8]
+// CHECK-FIX-NEXT: 244018: fb 3f ff 17 b #-196628
+// CHECK-FIX: __CortexA53843419_216004:
+// CHECK-FIX-NEXT: 24401c: 03 08 40 f9 ldr x3, [x0, #16]
+// CHECK-FIX-NEXT: 244020: fa 47 ff 17 b #-188440
+// CHECK-FIX: __CortexA53843419_218000:
+// CHECK-FIX-NEXT: 244024: 02 00 40 f9 ldr x2, [x0]
+// CHECK-FIX-NEXT: 244028: f7 4f ff 17 b #-180260
+// CHECK-FIX: __CortexA53843419_21A004:
+// CHECK-FIX-NEXT: 24402c: 9c 07 00 f9 str x28, [x28, #8]
+// CHECK-FIX-NEXT: 244030: f6 57 ff 17 b #-172072
+// CHECK-FIX: __CortexA53843419_21C004:
+// CHECK-FIX-NEXT: 244034: 84 0b 00 f9 str x4, [x28, #16]
+// CHECK-FIX-NEXT: 244038: f4 5f ff 17 b #-163888
+// CHECK-FIX: __CortexA53843419_21E000:
+// CHECK-FIX-NEXT: 24403c: bd 03 40 f9 ldr x29, [x29]
+// CHECK-FIX-NEXT: 244040: f1 67 ff 17 b #-155708
+// CHECK-FIX: __CortexA53843419_220004:
+// CHECK-FIX-NEXT: 244044: bd 07 40 f9 ldr x29, [x29, #8]
+// CHECK-FIX-NEXT: 244048: f0 6f ff 17 b #-147520
+// CHECK-FIX: __CortexA53843419_222004:
+// CHECK-FIX-NEXT: 24404c: 41 0a 40 f9 ldr x1, [x18, #16]
+// CHECK-FIX-NEXT: 244050: ee 77 ff 17 b #-139336
+// CHECK-FIX: __CortexA53843419_224000:
+// CHECK-FIX-NEXT: 244054: 52 02 40 f9 ldr x18, [x18]
+// CHECK-FIX-NEXT: 244058: eb 7f ff 17 b #-131156
+// CHECK-FIX: __CortexA53843419_226004:
+// CHECK-FIX-NEXT: 24405c: ea 05 40 f9 ldr x10, [x15, #8]
+// CHECK-FIX-NEXT: 244060: ea 87 ff 17 b #-122968
+// CHECK-FIX: __CortexA53843419_228000:
+// CHECK-FIX-NEXT: 244064: 0d 0a 40 f9 ldr x13, [x16, #16]
+// CHECK-FIX-NEXT: 244068: e7 8f ff 17 b #-114788
+// CHECK-FIX: __CortexA53843419_22A004:
+// CHECK-FIX-NEXT: 24406c: e9 00 40 f9 ldr x9, [x7]
+// CHECK-FIX-NEXT: 244070: e6 97 ff 17 b #-106600
+// CHECK-FIX: __CortexA53843419_22C004:
+// CHECK-FIX-NEXT: 244074: f6 06 40 f9 ldr x22, [x23, #8]
+// CHECK-FIX-NEXT: 244078: e4 9f ff 17 b #-98416
+// CHECK-FIX: __CortexA53843419_22E000:
+// CHECK-FIX-NEXT: 24407c: f8 0a 40 f9 ldr x24, [x23, #16]
+// CHECK-FIX-NEXT: 244080: e1 a7 ff 17 b #-90236
+// CHECK-FIX: __CortexA53843419_230004:
+// CHECK-FIX-NEXT: 244084: 02 00 40 f9 ldr x2, [x0]
+// CHECK-FIX-NEXT: 244088: e0 af ff 17 b #-82048
+// CHECK-FIX: __CortexA53843419_232008:
+// CHECK-FIX-NEXT: 24408c: 9b 07 00 f9 str x27, [x28, #8]
+// CHECK-FIX-NEXT: 244090: df b7 ff 17 b #-73860
+// CHECK-FIX: __CortexA53843419_234004:
+// CHECK-FIX-NEXT: 244094: 0e 0a 40 f9 ldr x14, [x16, #16]
+// CHECK-FIX-NEXT: 244098: dc bf ff 17 b #-65680
+// CHECK-FIX: __CortexA53843419_236004:
+// CHECK-FIX-NEXT: 24409c: 0e 06 40 f9 ldr x14, [x16, #8]
+// CHECK-FIX-NEXT: 2440a0: da c7 ff 17 b #-57496
+// CHECK-FIX: __CortexA53843419_238004:
+// CHECK-FIX-NEXT: 2440a4: 0e 06 40 f9 ldr x14, [x16, #8]
+// CHECK-FIX-NEXT: 2440a8: d8 cf ff 17 b #-49312
+// CHECK-FIX: __CortexA53843419_23A008:
+// CHECK-FIX-NEXT: 2440ac: 0e 06 40 f9 ldr x14, [x16, #8]
+// CHECK-FIX-NEXT: 2440b0: d7 d7 ff 17 b #-41124
+// CHECK-FIX: __CortexA53843419_23C008:
+// CHECK-FIX-NEXT: 2440b4: ea 00 40 f9 ldr x10, [x7]
+// CHECK-FIX-NEXT: 2440b8: d5 df ff 17 b #-32940
+// CHECK-FIX: __CortexA53843419_23E008:
+// CHECK-FIX-NEXT: 2440bc: 18 ff 3f f9 str x24, [x24, #32760]
+// CHECK-FIX-NEXT: 2440c0: d3 e7 ff 17 b #-24756
+// CHECK-FIX: __CortexA53843419_240000:
+// CHECK-FIX-NEXT: 2440c4: 01 08 40 f9 ldr x1, [x0, #16]
+// CHECK-FIX-NEXT: 2440c8: cf ef ff 17 b #-16580
+// CHECK-FIX: __CortexA53843419_242000:
+// CHECK-FIX-NEXT: 2440cc: 01 08 40 f9 ldr x1, [x0, #16]
+// CHECK-FIX-NEXT: 2440d0: cd f7 ff 17 b #-8396
+// CHECK-FIX: __CortexA53843419_244000:
+// CHECK-FIX-NEXT: 2440d4: 01 08 40 f9 ldr x1, [x0, #16]
+// CHECK-FIX-NEXT: 2440d8: cb ff ff 17 b #-212
.data
.globl dat
.globl dat2
Modified: lld/trunk/test/ELF/aarch64-data-relocs.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-data-relocs.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-data-relocs.s (original)
+++ lld/trunk/test/ELF/aarch64-data-relocs.s Fri Sep 21 09:58:13 2018
@@ -12,7 +12,7 @@ _start:
// S = 0x100, A = 0x24
// S + A = 0x124
// CHECK: Contents of section .R_AARCH64_ABS64:
-// CHECK-NEXT: 20000 24010000 00000000
+// CHECK-NEXT: 210000 24010000 00000000
.section .R_AARCH64_PREL64, "ax", at progbits
.xword foo - . + 0x24
@@ -20,4 +20,4 @@ _start:
// S = 0x100, A = 0x24, P = 0x20008
// S + A - P = 0xfffffffffffe011c
// CHECK: Contents of section .R_AARCH64_PREL64:
-// CHECK-NEXT: 20008 1c01feff ffffffff
+// CHECK-NEXT: 210008 1c01dfff ffffffff
Modified: lld/trunk/test/ELF/aarch64-gnu-ifunc-plt.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-gnu-ifunc-plt.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-gnu-ifunc-plt.s (original)
+++ lld/trunk/test/ELF/aarch64-gnu-ifunc-plt.s Fri Sep 21 09:58:13 2018
@@ -10,19 +10,19 @@
// Check that the IRELATIVE relocations are after the JUMP_SLOT in the plt
// CHECK: Relocations [
// CHECK-NEXT: Section (4) .rela.plt {
-// CHECK: 0x30018 R_AARCH64_JUMP_SLOT bar2 0x0
-// CHECK-NEXT: 0x30020 R_AARCH64_JUMP_SLOT zed2 0x0
-// CHECK-NEXT: 0x30028 R_AARCH64_IRELATIVE - 0x20000
-// CHECK-NEXT: 0x30030 R_AARCH64_IRELATIVE - 0x20004
+// CHECK: 0x220018 R_AARCH64_JUMP_SLOT bar2 0x0
+// CHECK-NEXT: 0x220020 R_AARCH64_JUMP_SLOT zed2 0x0
+// CHECK-NEXT: 0x220028 R_AARCH64_IRELATIVE - 0x210000
+// CHECK-NEXT: 0x220030 R_AARCH64_IRELATIVE - 0x210004
// CHECK-NEXT: }
// CHECK-NEXT: ]
// Check that .got.plt entries point back to PLT header
// GOTPLT: Contents of section .got.plt:
-// GOTPLT-NEXT: 30000 00000000 00000000 00000000 00000000
-// GOTPLT-NEXT: 30010 00000000 00000000 20000200 00000000
-// GOTPLT-NEXT: 30020 20000200 00000000 20000200 00000000
-// GOTPLT-NEXT: 30030 20000200 00000000
+// GOTPLT-NEXT: 220000 00000000 00000000 00000000 00000000
+// GOTPLT-NEXT: 220010 00000000 00000000 20002100 00000000
+// GOTPLT-NEXT: 220020 20002100 00000000 20002100 00000000
+// GOTPLT-NEXT: 220030 20002100 00000000
// Check that the PLTRELSZ tag includes the IRELATIVE relocations
// CHECK: DynamicSection [
@@ -31,44 +31,44 @@
// Check that a PLT header is written and the ifunc entries appear last
// DISASM: Disassembly of section .text:
// DISASM-NEXT: foo:
-// DISASM-NEXT: 20000: {{.*}} ret
+// DISASM-NEXT: 210000: {{.*}} ret
// DISASM: bar:
-// DISASM-NEXT: 20004: {{.*}} ret
+// DISASM-NEXT: 210004: {{.*}} ret
// DISASM: _start:
-// DISASM-NEXT: 20008: {{.*}} bl #88
-// DISASM-NEXT: 2000c: {{.*}} bl #100
-// DISASM-NEXT: 20010: {{.*}} bl #48
-// DISASM-NEXT: 20014: {{.*}} bl #60
+// DISASM-NEXT: 210008: {{.*}} bl #88
+// DISASM-NEXT: 21000c: {{.*}} bl #100
+// DISASM-NEXT: 210010: {{.*}} bl #48
+// DISASM-NEXT: 210014: {{.*}} bl #60
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-NEXT: .plt:
-// DISASM-NEXT: 20020: {{.*}} stp x16, x30, [sp, #-16]!
-// DISASM-NEXT: 20024: {{.*}} adrp x16, #65536
-// DISASM-NEXT: 20028: {{.*}} ldr x17, [x16, #16]
-// DISASM-NEXT: 2002c: {{.*}} add x16, x16, #16
-// DISASM-NEXT: 20030: {{.*}} br x17
-// DISASM-NEXT: 20034: {{.*}} nop
-// DISASM-NEXT: 20038: {{.*}} nop
-// DISASM-NEXT: 2003c: {{.*}} nop
+// DISASM-NEXT: 210020: {{.*}} stp x16, x30, [sp, #-16]!
+// DISASM-NEXT: 210024: {{.*}} adrp x16, #65536
+// DISASM-NEXT: 210028: {{.*}} ldr x17, [x16, #16]
+// DISASM-NEXT: 21002c: {{.*}} add x16, x16, #16
+// DISASM-NEXT: 210030: {{.*}} br x17
+// DISASM-NEXT: 210034: {{.*}} nop
+// DISASM-NEXT: 210038: {{.*}} nop
+// DISASM-NEXT: 21003c: {{.*}} nop
// DISASM-EMPTY:
// DISASM-NEXT: bar2 at plt:
-// DISASM-NEXT: 20040: {{.*}} adrp x16, #65536
-// DISASM-NEXT: 20044: {{.*}} ldr x17, [x16, #24]
-// DISASM-NEXT: 20048: {{.*}} add x16, x16, #24
-// DISASM-NEXT: 2004c: {{.*}} br x17
+// DISASM-NEXT: 210040: {{.*}} adrp x16, #65536
+// DISASM-NEXT: 210044: {{.*}} ldr x17, [x16, #24]
+// DISASM-NEXT: 210048: {{.*}} add x16, x16, #24
+// DISASM-NEXT: 21004c: {{.*}} br x17
// DISASM-EMPTY:
// DISASM-NEXT: zed2 at plt:
-// DISASM-NEXT: 20050: {{.*}} adrp x16, #65536
-// DISASM-NEXT: 20054: {{.*}} ldr x17, [x16, #32]
-// DISASM-NEXT: 20058: {{.*}} add x16, x16, #32
-// DISASM-NEXT: 2005c: {{.*}} br x17
-// DISASM-NEXT: 20060: {{.*}} adrp x16, #65536
-// DISASM-NEXT: 20064: {{.*}} ldr x17, [x16, #40]
-// DISASM-NEXT: 20068: {{.*}} add x16, x16, #40
-// DISASM-NEXT: 2006c: {{.*}} br x17
-// DISASM-NEXT: 20070: {{.*}} adrp x16, #65536
-// DISASM-NEXT: 20074: {{.*}} ldr x17, [x16, #48]
-// DISASM-NEXT: 20078: {{.*}} add x16, x16, #48
-// DISASM-NEXT: 2007c: {{.*}} br x17
+// DISASM-NEXT: 210050: {{.*}} adrp x16, #65536
+// DISASM-NEXT: 210054: {{.*}} ldr x17, [x16, #32]
+// DISASM-NEXT: 210058: {{.*}} add x16, x16, #32
+// DISASM-NEXT: 21005c: {{.*}} br x17
+// DISASM-NEXT: 210060: {{.*}} adrp x16, #65536
+// DISASM-NEXT: 210064: {{.*}} ldr x17, [x16, #40]
+// DISASM-NEXT: 210068: {{.*}} add x16, x16, #40
+// DISASM-NEXT: 21006c: {{.*}} br x17
+// DISASM-NEXT: 210070: {{.*}} adrp x16, #65536
+// DISASM-NEXT: 210074: {{.*}} ldr x17, [x16, #48]
+// DISASM-NEXT: 210078: {{.*}} add x16, x16, #48
+// DISASM-NEXT: 21007c: {{.*}} br x17
.text
.type foo STT_GNU_IFUNC
Modified: lld/trunk/test/ELF/aarch64-gnu-ifunc.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-gnu-ifunc.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-gnu-ifunc.s (original)
+++ lld/trunk/test/ELF/aarch64-gnu-ifunc.s Fri Sep 21 09:58:13 2018
@@ -22,8 +22,8 @@
// CHECK-NEXT: }
// CHECK: Relocations [
// CHECK-NEXT: Section ({{.*}}) .rela.plt {
-// CHECK-NEXT: 0x30000 R_AARCH64_IRELATIVE
-// CHECK-NEXT: 0x30008 R_AARCH64_IRELATIVE
+// CHECK-NEXT: 0x220000 R_AARCH64_IRELATIVE
+// CHECK-NEXT: 0x220008 R_AARCH64_IRELATIVE
// CHECK-NEXT: }
// CHECK-NEXT: ]
// CHECK: Symbols [
@@ -38,7 +38,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: $x.0
-// CHECK-NEXT: Value: 0x20000
+// CHECK-NEXT: Value: 0x210000
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Local
// CHECK-NEXT: Type: None
@@ -47,7 +47,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: __rela_iplt_end
-// CHECK-NEXT: Value: 0x10188
+// CHECK-NEXT: Value: 0x200188
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Local
// CHECK-NEXT: Type: None
@@ -58,7 +58,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: __rela_iplt_start
-// CHECK-NEXT: Value: 0x10158
+// CHECK-NEXT: Value: 0x200158
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Local
// CHECK-NEXT: Type: None
@@ -69,7 +69,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: _start
-// CHECK-NEXT: Value: 0x20008
+// CHECK-NEXT: Value: 0x210008
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: None
@@ -78,7 +78,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: bar
-// CHECK-NEXT: Value: 0x20004
+// CHECK-NEXT: Value: 0x210004
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: GNU_IFunc
@@ -87,7 +87,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: foo
-// CHECK-NEXT: Value: 0x20000
+// CHECK-NEXT: Value: 0x210000
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: GNU_IFunc
@@ -101,24 +101,24 @@
// DISASM: Disassembly of section .text:
// DISASM-NEXT: foo:
-// DISASM-NEXT: 20000: c0 03 5f d6 ret
+// DISASM-NEXT: 210000: c0 03 5f d6 ret
// DISASM: bar:
-// DISASM-NEXT: 20004: c0 03 5f d6 ret
+// DISASM-NEXT: 210004: c0 03 5f d6 ret
// DISASM: _start:
-// DISASM-NEXT: 20008: 06 00 00 94 bl #24
-// DISASM-NEXT: 2000c: 09 00 00 94 bl #36
-// DISASM-NEXT: 20010: 42 60 05 91 add x2, x2, #344
-// DISASM-NEXT: 20014: 42 20 06 91 add x2, x2, #392
+// DISASM-NEXT: 210008: 06 00 00 94 bl #24
+// DISASM-NEXT: 21000c: 09 00 00 94 bl #36
+// DISASM-NEXT: 210010: 42 60 05 91 add x2, x2, #344
+// DISASM-NEXT: 210014: 42 20 06 91 add x2, x2, #392
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-NEXT: .plt:
-// DISASM-NEXT: 20020: 90 00 00 90 adrp x16, #65536
-// DISASM-NEXT: 20024: 11 02 40 f9 ldr x17, [x16]
-// DISASM-NEXT: 20028: 10 02 00 91 add x16, x16, #0
-// DISASM-NEXT: 2002c: 20 02 1f d6 br x17
-// DISASM-NEXT: 20030: 90 00 00 90 adrp x16, #65536
-// DISASM-NEXT: 20034: 11 06 40 f9 ldr x17, [x16, #8]
-// DISASM-NEXT: 20038: 10 22 00 91 add x16, x16, #8
-// DISASM-NEXT: 2003c: 20 02 1f d6 br x17
+// DISASM-NEXT: 210020: 90 00 00 90 adrp x16, #65536
+// DISASM-NEXT: 210024: 11 02 40 f9 ldr x17, [x16]
+// DISASM-NEXT: 210028: 10 02 00 91 add x16, x16, #0
+// DISASM-NEXT: 21002c: 20 02 1f d6 br x17
+// DISASM-NEXT: 210030: 90 00 00 90 adrp x16, #65536
+// DISASM-NEXT: 210034: 11 06 40 f9 ldr x17, [x16, #8]
+// DISASM-NEXT: 210038: 10 22 00 91 add x16, x16, #8
+// DISASM-NEXT: 21003c: 20 02 1f d6 br x17
.text
.type foo STT_GNU_IFUNC
Modified: lld/trunk/test/ELF/aarch64-jump26-thunk.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-jump26-thunk.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-jump26-thunk.s (original)
+++ lld/trunk/test/ELF/aarch64-jump26-thunk.s Fri Sep 21 09:58:13 2018
@@ -11,10 +11,10 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-NEXT: _start:
-// CHECK-NEXT: 20000: 02 00 00 14 b #8
+// CHECK-NEXT: 210000: 02 00 00 14 b #8
// CHECK: __AArch64AbsLongThunk_big:
-// CHECK-NEXT: 20008: 50 00 00 58 ldr x16, #8
-// CHECK-NEXT: 2000c: 00 02 1f d6 br x16
+// CHECK-NEXT: 210008: 50 00 00 58 ldr x16, #8
+// CHECK-NEXT: 21000c: 00 02 1f d6 br x16
// CHECK: $d:
-// CHECK-NEXT: 20010: 00 00 00 00 .word 0x00000000
-// CHECK-NEXT: 20014: 10 00 00 00 .word 0x00000010
+// CHECK-NEXT: 210010: 00 00 00 00 .word 0x00000000
+// CHECK-NEXT: 210014: 10 00 00 00 .word 0x00000010
Modified: lld/trunk/test/ELF/aarch64-lo12-alignment.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-lo12-alignment.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-lo12-alignment.s (original)
+++ lld/trunk/test/ELF/aarch64-lo12-alignment.s Fri Sep 21 09:58:13 2018
@@ -39,7 +39,7 @@ foo4:
foo8:
.space 8
-// CHECK: improper alignment for relocation R_AARCH64_LDST16_ABS_LO12_NC: 0x30001 is not aligned to 2 bytes
-// CHECK-NEXT: improper alignment for relocation R_AARCH64_LDST32_ABS_LO12_NC: 0x30002 is not aligned to 4 bytes
-// CHECK-NEXT: improper alignment for relocation R_AARCH64_LDST64_ABS_LO12_NC: 0x30004 is not aligned to 8 bytes
-// CHECK-NEXT: improper alignment for relocation R_AARCH64_LDST128_ABS_LO12_NC: 0x30008 is not aligned to 16 bytes
+// CHECK: improper alignment for relocation R_AARCH64_LDST16_ABS_LO12_NC: 0x220001 is not aligned to 2 bytes
+// CHECK-NEXT: improper alignment for relocation R_AARCH64_LDST32_ABS_LO12_NC: 0x220002 is not aligned to 4 bytes
+// CHECK-NEXT: improper alignment for relocation R_AARCH64_LDST64_ABS_LO12_NC: 0x220004 is not aligned to 8 bytes
+// CHECK-NEXT: improper alignment for relocation R_AARCH64_LDST128_ABS_LO12_NC: 0x220008 is not aligned to 16 bytes
Modified: lld/trunk/test/ELF/aarch64-prel16.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-prel16.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-prel16.s (original)
+++ lld/trunk/test/ELF/aarch64-prel16.s Fri Sep 21 09:58:13 2018
@@ -7,8 +7,8 @@
.globl _start
_start:
.data
- .hword foo - . + 0x20eff
- .hword foo - . + 0x8f02
+ .hword foo - . + 0x210eff
+ .hword foo - . + 0x1f8f02
// Note: If this test fails, it probably happens because of
// the change of the address of the .data section.
@@ -18,14 +18,14 @@ _start:
// RUN: llvm-objdump -s -section=.data %t2 | FileCheck %s
// CHECK: Contents of section .data:
-// 11000: S = 0x100, A = 0x20eff, P = 0x11000
-// S + A - P = 0xffff
-// 11002: S = 0x100, A = 0x8f02, P = 0x11002
-// S + A - P = 0x8000
-// CHECK-NEXT: 11000 ffff0080
+// 201000: S = 0x100, A = 0x210eff, P = 0x201000
+// S + A - P = 0xffff
+// 201002: S = 0x100, A = 0x1f8f02, P = 0x201002
+// S + A - P = 0x8000
+// CHECK-NEXT: 201000 ffff0080
-// RUN: not ld.lld %t.o %t255.o -o %t2
-// | FileCheck %s --check-prefix=OVERFLOW
-// RUN: not ld.lld %t.o %t257.o -o %t2
-// | FileCheck %s --check-prefix=OVERFLOW
-// OVERFLOW: Relocation R_AARCH64_PREL16 out of range: -94209 is not in [-32768, 65535]
+// RUN: not ld.lld -z max-page-size=4096 %t.o %t255.o -o %t2 2>&1 | FileCheck %s --check-prefix=OVERFLOW1
+// OVERFLOW1: relocation R_AARCH64_PREL16 out of range: -32769 is not in [-32768, 32767]
+
+// RUN: not ld.lld -z max-page-size=4096 %t.o %t257.o -o %t2 2>&1 | FileCheck %s --check-prefix=OVERFLOW2
+// OVERFLOW2: relocation R_AARCH64_PREL16 out of range: 65536 is not in [-32768, 32767]
Modified: lld/trunk/test/ELF/aarch64-prel32.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-prel32.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-prel32.s (original)
+++ lld/trunk/test/ELF/aarch64-prel32.s Fri Sep 21 09:58:13 2018
@@ -7,8 +7,8 @@
.globl _start
_start:
.data
- .word foo - . + 0x100010eff
- .word foo - . - 0x7ffef0fc
+ .word foo - . + 0x100200eff
+ .word foo - . - 0x7fdff0fc
// Note: If this test fails, it probably happens because of
// the change of the address of the .data section.
@@ -18,14 +18,14 @@ _start:
// RUN: llvm-objdump -s -section=.data %t2 | FileCheck %s
// CHECK: Contents of section .data:
-// 11000: S = 0x100, A = 0x100010eff, P = 0x11000
-// S + A - P = 0xffffffff
-// 11004: S = 0x100, A = -0x7ffef0fc, P = 0x11004
-// S + A - P = 0x80000000
-// CHECK-NEXT: 11000 ffffffff 00000080
+// 201000: S = 0x100, A = 0x100200eff, P = 0x201000
+// S + A - P = 0xffffffff
+// 201004: S = 0x100, A = -0x7fdff0fc, P = 0x201004
+// S + A - P = 0x80000000
+// CHECK-NEXT: 201000 ffffffff 00000080
-// RUN: not ld.lld %t.o %t255.o -o %t2
-// | FileCheck %s --check-prefix=OVERFLOW
-// RUN: not ld.lld %t.o %t257.o -o %t2
-// | FileCheck %s --check-prefix=OVERFLOW
-// OVERFLOW: Relocation R_AARCH64_PREL32 out of range: 18446744071562006527 is not in [-2147483648, 4294967295]
+// RUN: not ld.lld -z max-page-size=4096 %t.o %t255.o -o %t2 2>&1 | FileCheck %s --check-prefix=OVERFLOW1
+// OVERFLOW1: relocation R_AARCH64_PREL32 out of range: -2147483649 is not in [-2147483648, 2147483647]
+
+// RUN: not ld.lld -z max-page-size=4096 %t.o %t257.o -o %t2 2>&1 | FileCheck %s --check-prefix=OVERFLOW2
+// OVERFLOW2: relocation R_AARCH64_PREL32 out of range: 4294967296 is not in [-2147483648, 2147483647]
Modified: lld/trunk/test/ELF/aarch64-relocs.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-relocs.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-relocs.s (original)
+++ lld/trunk/test/ELF/aarch64-relocs.s Fri Sep 21 09:58:13 2018
@@ -24,13 +24,13 @@ mystr:
.asciz "blah"
.size mystr, 4
-# S = 0x20012, A = 0x4, P = 0x20012
-# PAGE(S + A) = 0x11000
-# PAGE(P) = 0x11000
+# S = 0x210012, A = 0x4, P = 0x210012
+# PAGE(S + A) = 0x210000
+# PAGE(P) = 0x210000
#
# CHECK: Disassembly of section .R_AARCH64_ADR_PREL_PG_H121:
# CHECK-NEXT: $x.2:
-# CHECK-NEXT: 20012: 01 00 00 90 adrp x1, #0
+# CHECK-NEXT: 210012: 01 00 00 90 adrp x1, #0
.section .R_AARCH64_ADD_ABS_LO12_NC,"ax", at progbits
add x0, x0, :lo12:.L.str
@@ -38,13 +38,13 @@ mystr:
.asciz "blah"
.size mystr, 4
-# S = 0x2001b, A = 0x4
+# S = 0x21001b, A = 0x4
# R = (S + A) & 0xFFF = 0x1f
# R << 10 = 0x7c00
#
# CHECK: Disassembly of section .R_AARCH64_ADD_ABS_LO12_NC:
# CHECK-NEXT: $x.4:
-# CHECK-NEXT: 2001b: 00 7c 00 91 add x0, x0, #31
+# CHECK-NEXT: 21001b: 00 7c 00 91 add x0, x0, #31
.section .R_AARCH64_LDST64_ABS_LO12_NC,"ax", at progbits
ldr x28, [x27, :lo12:foo]
@@ -52,12 +52,12 @@ foo:
.asciz "foo"
.size mystr, 3
-# S = 0x20024, A = 0x4
+# S = 0x210024, A = 0x4
# R = ((S + A) & 0xFFF) << 7 = 0x00001400
# 0x00001400 | 0xf940177c = 0xf940177c
# CHECK: Disassembly of section .R_AARCH64_LDST64_ABS_LO12_NC:
# CHECK-NEXT: $x.6:
-# CHECK-NEXT: 20024: 7c 17 40 f9 ldr x28, [x27, #40]
+# CHECK-NEXT: 210024: 7c 17 40 f9 ldr x28, [x27, #40]
.section .SUB,"ax", at progbits
nop
@@ -66,33 +66,33 @@ sub:
# CHECK: Disassembly of section .SUB:
# CHECK-NEXT: $x.8:
-# CHECK-NEXT: 2002c: 1f 20 03 d5 nop
+# CHECK-NEXT: 21002c: 1f 20 03 d5 nop
# CHECK: sub:
-# CHECK-NEXT: 20030: 1f 20 03 d5 nop
+# CHECK-NEXT: 210030: 1f 20 03 d5 nop
.section .R_AARCH64_CALL26,"ax", at progbits
call26:
bl sub
-# S = 0x2002c, A = 0x4, P = 0x20034
+# S = 0x21002c, A = 0x4, P = 0x210034
# R = S + A - P = -0x4 = 0xfffffffc
# (R & 0x0ffffffc) >> 2 = 0x03ffffff
# 0x94000000 | 0x03ffffff = 0x97ffffff
# CHECK: Disassembly of section .R_AARCH64_CALL26:
# CHECK-NEXT: call26:
-# CHECK-NEXT: 20034: ff ff ff 97 bl #-4
+# CHECK-NEXT: 210034: ff ff ff 97 bl #-4
.section .R_AARCH64_JUMP26,"ax", at progbits
jump26:
b sub
-# S = 0x2002c, A = 0x4, P = 0x20038
+# S = 0x21002c, A = 0x4, P = 0x210038
# R = S + A - P = -0x8 = 0xfffffff8
# (R & 0x0ffffffc) >> 2 = 0x03fffffe
# 0x14000000 | 0x03fffffe = 0x17fffffe
# CHECK: Disassembly of section .R_AARCH64_JUMP26:
# CHECK-NEXT: jump26:
-# CHECK-NEXT: 20038: fe ff ff 17 b #-8
+# CHECK-NEXT: 210038: fe ff ff 17 b #-8
.section .R_AARCH64_LDST32_ABS_LO12_NC,"ax", at progbits
ldst32:
@@ -101,12 +101,12 @@ foo32:
.asciz "foo"
.size mystr, 3
-# S = 0x2003c, A = 0x4
+# S = 0x21003c, A = 0x4
# R = ((S + A) & 0xFFC) << 8 = 0x00004000
# 0x00004000 | 0xbd4000a4 = 0xbd4040a4
# CHECK: Disassembly of section .R_AARCH64_LDST32_ABS_LO12_NC:
# CHECK-NEXT: ldst32:
-# CHECK-NEXT: 2003c: a4 40 40 bd ldr s4, [x5, #64]
+# CHECK-NEXT: 21003c: a4 40 40 bd ldr s4, [x5, #64]
.section .R_AARCH64_LDST8_ABS_LO12_NC,"ax", at progbits
ldst8:
@@ -115,12 +115,12 @@ foo8:
.asciz "foo"
.size mystr, 3
-# S = 0x20044, A = 0x4
+# S = 0x210044, A = 0x4
# R = ((S + A) & 0xFFF) << 10 = 0x00012000
# 0x00012000 | 0x398001ab = 0x398121ab
# CHECK: Disassembly of section .R_AARCH64_LDST8_ABS_LO12_NC:
# CHECK-NEXT: ldst8:
-# CHECK-NEXT: 20044: ab 21 81 39 ldrsb x11, [x13, #72]
+# CHECK-NEXT: 210044: ab 21 81 39 ldrsb x11, [x13, #72]
.section .R_AARCH64_LDST128_ABS_LO12_NC,"ax", at progbits
ldst128:
@@ -129,14 +129,14 @@ foo128:
.asciz "foo"
.size mystr, 3
-# S = 0x2004c, A = 0x4
+# S = 0x21004c, A = 0x4
# R = ((S + A) & 0xFF8) << 6 = 0x00001400
# 0x00001400 | 0x3dc00274 = 0x3dc01674
# CHECK: Disassembly of section .R_AARCH64_LDST128_ABS_LO12_NC:
# CHECK: ldst128:
-# CHECK: 2004c: 74 16 c0 3d ldr q20, [x19, #80]
+# CHECK: 21004c: 74 16 c0 3d ldr q20, [x19, #80]
#foo128:
-# 20050: 66 6f 6f 00 .word
+# 210050: 66 6f 6f 00 .word
.section .R_AARCH64_LDST16_ABS_LO12_NC,"ax", at progbits
ldst16:
@@ -147,14 +147,14 @@ foo16:
.asciz "foo"
.size mystr, 4
-# S = 0x20054, A = 0x4
+# S = 0x210054, A = 0x4
# R = ((S + A) & 0x0FFC) << 9 = 0xb000
# 0xb000 | 0x7d400271 = 0x7d40b271
# CHECK: Disassembly of section .R_AARCH64_LDST16_ABS_LO12_NC:
# CHECK-NEXT: ldst16:
-# CHECK-NEXT: 20054: 71 c2 40 7d ldr h17, [x19, #96]
-# CHECK-NEXT: 20058: 61 c2 40 79 ldrh w1, [x19, #96]
-# CHECK-NEXT: 2005c: 62 c6 40 79 ldrh w2, [x19, #98]
+# CHECK-NEXT: 210054: 71 c2 40 7d ldr h17, [x19, #96]
+# CHECK-NEXT: 210058: 61 c2 40 79 ldrh w1, [x19, #96]
+# CHECK-NEXT: 21005c: 62 c6 40 79 ldrh w2, [x19, #98]
.section .R_AARCH64_MOVW_UABS,"ax", at progbits
movz1:
Modified: lld/trunk/test/ELF/aarch64-thunk-section-location.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-thunk-section-location.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-thunk-section-location.s (original)
+++ lld/trunk/test/ELF/aarch64-thunk-section-location.s Fri Sep 21 09:58:13 2018
@@ -1,7 +1,7 @@
// REQUIRES: aarch64
// RUN: llvm-mc -filetype=obj -triple=aarch64-linux-gnu %s -o %t
// RUN: ld.lld %t -o %t2 2>&1
-// RUN: llvm-objdump -d -start-address=134086664 -stop-address=134086676 -triple=aarch64-linux-gnu %t2 | FileCheck %s
+// RUN: llvm-objdump -d -start-address=136118280 -stop-address=136118292 -triple=aarch64-linux-gnu %t2 | FileCheck %s
// Check that the range extension thunks are dumped close to the aarch64 branch
// range of 128 MiB
.section .text.1, "ax", %progbits
@@ -35,7 +35,7 @@ high_target:
ret
// CHECK: __AArch64AbsLongThunk_high_target:
-// CHECK-NEXT: 7fe0008: 50 00 00 58 ldr x16, #8
-// CHECK-NEXT: 7fe000c: 00 02 1f d6 br x16
+// CHECK-NEXT: 81d0008: 50 00 00 58 ldr x16, #8
+// CHECK-NEXT: 81d000c: 00 02 1f d6 br x16
// CHECK: $d:
-// CHECK-NEXT: 7fe0010: 00 10 02 08 .word 0x08021000
+// CHECK-NEXT: 81d0010: 00 10 21 08 .word 0x08211000
Modified: lld/trunk/test/ELF/aarch64-tls-gdie.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tls-gdie.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tls-gdie.s (original)
+++ lld/trunk/test/ELF/aarch64-tls-gdie.s Fri Sep 21 09:58:13 2018
@@ -21,14 +21,14 @@ _start:
// SEC-NEXT: SHF_ALLOC
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x300B0
+// SEC-NEXT: Address: 0x2200B0
-// page(0x300B0) - page(0x20004) = 65536
+// page(0x2200B0) - page(0x20004) = 65536
// 0x0B0 = 176
// CHECK: _start:
-// CHECK-NEXT: 20000: {{.*}} nop
-// CHECK-NEXT: 20004: {{.*}} adrp x0, #65536
-// CHECK-NEXT: 20008: {{.*}} ldr x0, [x0, #176]
-// CHECK-NEXT: 2000c: {{.*}} nop
-// CHECK-NEXT: 20010: {{.*}} nop
+// CHECK-NEXT: 210000: {{.*}} nop
+// CHECK-NEXT: 210004: {{.*}} adrp x0, #65536
+// CHECK-NEXT: 210008: {{.*}} ldr x0, [x0, #176]
+// CHECK-NEXT: 21000c: {{.*}} nop
+// CHECK-NEXT: 210010: {{.*}} nop
Modified: lld/trunk/test/ELF/aarch64-tls-gdle.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tls-gdle.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tls-gdle.s (original)
+++ lld/trunk/test/ELF/aarch64-tls-gdle.s Fri Sep 21 09:58:13 2018
@@ -12,10 +12,10 @@
# TCB size = 0x16 and foo is first element from TLS register.
# CHECK: Disassembly of section .text:
# CHECK: _start:
-# CHECK: 20000: 00 00 a0 d2 movz x0, #0, lsl #16
-# CHECK: 20004: 00 02 80 f2 movk x0, #16
-# CHECK: 20008: 1f 20 03 d5 nop
-# CHECK: 2000c: 1f 20 03 d5 nop
+# CHECK: 210000: 00 00 a0 d2 movz x0, #0, lsl #16
+# CHECK: 210004: 00 02 80 f2 movk x0, #16
+# CHECK: 210008: 1f 20 03 d5 nop
+# CHECK: 21000c: 1f 20 03 d5 nop
.globl _start
_start:
Modified: lld/trunk/test/ELF/aarch64-tls-ie.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tls-ie.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tls-ie.s (original)
+++ lld/trunk/test/ELF/aarch64-tls-ie.s Fri Sep 21 09:58:13 2018
@@ -15,7 +15,7 @@
#RELOC-NEXT: SHF_ALLOC
#RELOC-NEXT: SHF_WRITE
#RELOC-NEXT: ]
-#RELOC-NEXT: Address: 0x300B0
+#RELOC-NEXT: Address: 0x2200B0
#RELOC-NEXT: Offset: 0x200B0
#RELOC-NEXT: Size: 16
#RELOC-NEXT: Link: 0
@@ -25,21 +25,21 @@
#RELOC-NEXT: }
#RELOC: Relocations [
#RELOC-NEXT: Section ({{.*}}) .rela.dyn {
-#RELOC-NEXT: 0x300B8 R_AARCH64_TLS_TPREL64 bar 0x0
-#RELOC-NEXT: 0x300B0 R_AARCH64_TLS_TPREL64 foo 0x0
+#RELOC-NEXT: 0x2200B8 R_AARCH64_TLS_TPREL64 bar 0x0
+#RELOC-NEXT: 0x2200B0 R_AARCH64_TLS_TPREL64 foo 0x0
#RELOC-NEXT: }
#RELOC-NEXT:]
-# Page(0x300B0) - Page(0x20000) = 0x10000 = 65536
-# 0x300B0 & 0xff8 = 0xB0 = 176
-# Page(0x300B8) - Page(0x20000) = 0x10000 = 65536
-# 0x300B8 & 0xff8 = 0xB8 = 184
+# Page(0x2200B0) - Page(0x210000) = 0x10000 = 65536
+# 0x2200B0 & 0xff8 = 0xB0 = 176
+# Page(0x2200B8) - Page(0x210000) = 0x10000 = 65536
+# 0x2200B8 & 0xff8 = 0xB8 = 184
#CHECK: Disassembly of section .text:
#CHECK: _start:
-#CHECK: 20000: 80 00 00 90 adrp x0, #65536
-#CHECK: 20004: 00 58 40 f9 ldr x0, [x0, #176]
-#CHECK: 20008: 80 00 00 90 adrp x0, #65536
-#CHECK: 2000c: 00 5c 40 f9 ldr x0, [x0, #184]
+#CHECK: 210000: 80 00 00 90 adrp x0, #65536
+#CHECK: 210004: 00 58 40 f9 ldr x0, [x0, #176]
+#CHECK: 210008: 80 00 00 90 adrp x0, #65536
+#CHECK: 21000c: 00 5c 40 f9 ldr x0, [x0, #184]
.globl _start
_start:
Modified: lld/trunk/test/ELF/aarch64-tls-iele.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tls-iele.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tls-iele.s (original)
+++ lld/trunk/test/ELF/aarch64-tls-iele.s Fri Sep 21 09:58:13 2018
@@ -12,10 +12,10 @@
# TCB size = 0x16 and foo is first element from TLS register.
# CHECK: Disassembly of section .text:
# CHECK: _start:
-# CHECK-NEXT: 20000: 00 00 a0 d2 movz x0, #0, lsl #16
-# CHECK-NEXT: 20004: 80 02 80 f2 movk x0, #20
-# CHECK-NEXT: 20008: 00 00 a0 d2 movz x0, #0, lsl #16
-# CHECK-NEXT: 2000c: 00 02 80 f2 movk x0, #16
+# CHECK-NEXT: 210000: 00 00 a0 d2 movz x0, #0, lsl #16
+# CHECK-NEXT: 210004: 80 02 80 f2 movk x0, #20
+# CHECK-NEXT: 210008: 00 00 a0 d2 movz x0, #0, lsl #16
+# CHECK-NEXT: 21000c: 00 02 80 f2 movk x0, #16
.section .tdata
.align 2
Modified: lld/trunk/test/ELF/aarch64-tls-le.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tls-le.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tls-le.s (original)
+++ lld/trunk/test/ELF/aarch64-tls-le.s Fri Sep 21 09:58:13 2018
@@ -17,9 +17,9 @@ _start:
# TCB size = 0x16 and foo is first element from TLS register.
#CHECK: Disassembly of section .text:
#CHECK: _start:
-#CHECK: 20000: 40 d0 3b d5 mrs x0, TPIDR_EL0
-#CHECK: 20004: 00 00 40 91 add x0, x0, #0, lsl #12
-#CHECK: 20008: 00 40 00 91 add x0, x0, #16
+#CHECK: 210000: 40 d0 3b d5 mrs x0, TPIDR_EL0
+#CHECK: 210004: 00 00 40 91 add x0, x0, #0, lsl #12
+#CHECK: 210008: 00 40 00 91 add x0, x0, #16
.type v1, at object
.section .tbss,"awT", at nobits
Modified: lld/trunk/test/ELF/aarch64-tlsld-ldst.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tlsld-ldst.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tlsld-ldst.s (original)
+++ lld/trunk/test/ELF/aarch64-tlsld-ldst.s Fri Sep 21 09:58:13 2018
@@ -25,22 +25,22 @@ _start: mrs x8, TPIDR_EL0
ldrb w0, [x8, :tprel_lo12_nc:var4]
// CHECK: _start:
-// CHECK-NEXT: 20000: 48 d0 3b d5 mrs x8, TPIDR_EL0
+// CHECK-NEXT: 210000: 48 d0 3b d5 mrs x8, TPIDR_EL0
// 0x0 + c10 = 0xc10 = tcb (16-bytes) + var0
-// CHECK-NEXT: 20004: 08 01 40 91 add x8, x8, #0, lsl #12
-// CHECK-NEXT: 20008: 14 05 c3 3d ldr q20, [x8, #3088]
+// CHECK-NEXT: 210004: 08 01 40 91 add x8, x8, #0, lsl #12
+// CHECK-NEXT: 210008: 14 05 c3 3d ldr q20, [x8, #3088]
// 0x1000 + 0x820 = 0x1820 = tcb + var1
-// CHECK-NEXT: 2000c: 08 05 40 91 add x8, x8, #1, lsl #12
-// CHECK-NEXT: 20010: 00 11 44 f9 ldr x0, [x8, #2080]
+// CHECK-NEXT: 21000c: 08 05 40 91 add x8, x8, #1, lsl #12
+// CHECK-NEXT: 210010: 00 11 44 f9 ldr x0, [x8, #2080]
// 0x2000 + 0x428 = 0x2428 = tcb + var2
-// CHECK-NEXT: 20014: 08 09 40 91 add x8, x8, #2, lsl #12
-// CHECK-NEXT: 20018: 00 29 44 b9 ldr w0, [x8, #1064]
+// CHECK-NEXT: 210014: 08 09 40 91 add x8, x8, #2, lsl #12
+// CHECK-NEXT: 210018: 00 29 44 b9 ldr w0, [x8, #1064]
// 0x3000 + 0x2c = 0x302c = tcb + var3
-// CHECK-NEXT: 2001c: 08 0d 40 91 add x8, x8, #3, lsl #12
-// CHECK-NEXT: 20020: 00 59 40 79 ldrh w0, [x8, #44]
+// CHECK-NEXT: 21001c: 08 0d 40 91 add x8, x8, #3, lsl #12
+// CHECK-NEXT: 210020: 00 59 40 79 ldrh w0, [x8, #44]
// 0x3000 + 0xc2e = 0x32ce = tcb + var4
-// CHECK-NEXT: 20024: 08 0d 40 91 add x8, x8, #3, lsl #12
-// CHECK-NEXT: 20028: 00 b9 70 39 ldrb w0, [x8, #3118]
+// CHECK-NEXT: 210024: 08 0d 40 91 add x8, x8, #3, lsl #12
+// CHECK-NEXT: 210028: 00 b9 70 39 ldrb w0, [x8, #3118]
// CHECK-SYMS: 0000000000000c00 0 TLS GLOBAL DEFAULT 2 var0
// CHECK-SYMS-NEXT: 0000000000001810 4 TLS GLOBAL DEFAULT 2 var1
Modified: lld/trunk/test/ELF/aarch64-tstbr14-reloc.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tstbr14-reloc.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tstbr14-reloc.s (original)
+++ lld/trunk/test/ELF/aarch64-tstbr14-reloc.s Fri Sep 21 09:58:13 2018
@@ -13,19 +13,19 @@
# 0x11028 - 24 = 0x20010
# CHECK: Disassembly of section .text:
# CHECK-NEXT: _foo:
-# CHECK-NEXT: 20000: {{.*}} nop
-# CHECK-NEXT: 20004: {{.*}} nop
-# CHECK-NEXT: 20008: {{.*}} nop
-# CHECK-NEXT: 2000c: {{.*}} nop
+# CHECK-NEXT: 210000: {{.*}} nop
+# CHECK-NEXT: 210004: {{.*}} nop
+# CHECK-NEXT: 210008: {{.*}} nop
+# CHECK-NEXT: 21000c: {{.*}} nop
# CHECK: _bar:
-# CHECK-NEXT: 20010: {{.*}} nop
-# CHECK-NEXT: 20014: {{.*}} nop
-# CHECK-NEXT: 20018: {{.*}} nop
+# CHECK-NEXT: 210010: {{.*}} nop
+# CHECK-NEXT: 210014: {{.*}} nop
+# CHECK-NEXT: 210018: {{.*}} nop
# CHECK: _start:
-# CHECK-NEXT: 2001c: {{.*}} tbnz w3, #15, #-28
-# CHECK-NEXT: 20020: {{.*}} tbnz w3, #15, #-16
-# CHECK-NEXT: 20024: {{.*}} tbz x6, #45, #-36
-# CHECK-NEXT: 20028: {{.*}} tbz x6, #45, #-24
+# CHECK-NEXT: 21001c: {{.*}} tbnz w3, #15, #-28
+# CHECK-NEXT: 210020: {{.*}} tbnz w3, #15, #-16
+# CHECK-NEXT: 210024: {{.*}} tbz x6, #45, #-36
+# CHECK-NEXT: 210028: {{.*}} tbz x6, #45, #-24
#DSOREL: Section {
#DSOREL: Index:
Modified: lld/trunk/test/ELF/aarch64-undefined-weak.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-undefined-weak.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-undefined-weak.s (original)
+++ lld/trunk/test/ELF/aarch64-undefined-weak.s Fri Sep 21 09:58:13 2018
@@ -34,16 +34,16 @@ _start:
ldr x8, target
// CHECK: Disassembly of section .text:
-// 131072 = 0x20000
-// CHECK: 20000: {{.*}} b #4
-// CHECK-NEXT: 20004: {{.*}} bl #4
-// CHECK-NEXT: 20008: {{.*}} b.eq #4
-// CHECK-NEXT: 2000c: {{.*}} cbz x1, #4
-// CHECK-NEXT: 20010: {{.*}} adr x0, #0
-// CHECK-NEXT: 20014: {{.*}} adrp x0, #-131072
-// CHECK: 20018: {{.*}} .word 0x00000000
-// CHECK-NEXT: 2001c: {{.*}} .word 0x00000000
-// CHECK-NEXT: 20020: {{.*}} .word 0x00000000
-// CHECK-NEXT: 20024: {{.*}} .short 0x0000
+// 2162688 = 0x210000
+// CHECK: 210000: {{.*}} b #4
+// CHECK-NEXT: 210004: {{.*}} bl #4
+// CHECK-NEXT: 210008: {{.*}} b.eq #4
+// CHECK-NEXT: 21000c: {{.*}} cbz x1, #4
+// CHECK-NEXT: 210010: {{.*}} adr x0, #0
+// CHECK-NEXT: 210014: {{.*}} adrp x0, #-2162688
+// CHECK: 210018: {{.*}} .word 0x00000000
+// CHECK-NEXT: 21001c: {{.*}} .word 0x00000000
+// CHECK-NEXT: 210020: {{.*}} .word 0x00000000
+// CHECK-NEXT: 210024: {{.*}} .short 0x0000
// CHECK: $x.2:
-// CHECK-NEXT: 20026: {{.*}} ldr x8, #0
+// CHECK-NEXT: 210026: {{.*}} ldr x8, #0
Modified: lld/trunk/test/ELF/basic-aarch64.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/basic-aarch64.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/basic-aarch64.s (original)
+++ lld/trunk/test/ELF/basic-aarch64.s Fri Sep 21 09:58:13 2018
@@ -59,7 +59,7 @@ _start:
# CHECK-NEXT: SHF_ALLOC (0x2)
# CHECK-NEXT: SHF_EXECINSTR (0x4)
# CHECK-NEXT: ]
-# CHECK-NEXT: Address: 0x20000
+# CHECK-NEXT: Address: 0x210000
# CHECK-NEXT: Offset: 0x10000
# CHECK-NEXT: Size: 12
# CHECK-NEXT: Link: 0
@@ -138,7 +138,7 @@ _start:
# CHECK-NEXT: }
# CHECK-NEXT: Symbol {
# CHECK-NEXT: Name: $x.0
-# CHECK-NEXT: Value: 0x20000
+# CHECK-NEXT: Value: 0x210000
# CHECK-NEXT: Size: 0
# CHECK-NEXT: Binding: Local (0x0)
# CHECK-NEXT: Type: None (0x0)
@@ -159,8 +159,8 @@ _start:
# CHECK-NEXT: ProgramHeader {
# CHECK-NEXT: Type: PT_PHDR (0x6)
# CHECK-NEXT: Offset: 0x40
-# CHECK-NEXT: VirtualAddress: 0x10040
-# CHECK-NEXT: PhysicalAddress: 0x10040
+# CHECK-NEXT: VirtualAddress: 0x200040
+# CHECK-NEXT: PhysicalAddress: 0x200040
# CHECK-NEXT: FileSize: 224
# CHECK-NEXT: MemSize: 224
# CHECK-NEXT: Flags [ (0x4)
@@ -171,8 +171,8 @@ _start:
# CHECK-NEXT: ProgramHeader {
# CHECK-NEXT: Type: PT_LOAD (0x1)
# CHECK-NEXT: Offset: 0x0
-# CHECK-NEXT: VirtualAddress: 0x10000
-# CHECK-NEXT: PhysicalAddress: 0x10000
+# CHECK-NEXT: VirtualAddress: 0x200000
+# CHECK-NEXT: PhysicalAddress: 0x200000
# CHECK-NEXT: FileSize: 288
# CHECK-NEXT: MemSize: 288
# CHECK-NEXT: Flags [
@@ -183,8 +183,8 @@ _start:
# CHECK-NEXT: ProgramHeader {
# CHECK-NEXT: Type: PT_LOAD (0x1)
# CHECK-NEXT: Offset: 0x1000
-# CHECK-NEXT: VirtualAddress: 0x20000
-# CHECK-NEXT: PhysicalAddress: 0x20000
+# CHECK-NEXT: VirtualAddress: 0x210000
+# CHECK-NEXT: PhysicalAddress: 0x210000
# CHECK-NEXT: FileSize: 4096
# CHECK-NEXT: MemSize: 4096
# CHECK-NEXT: Flags [ (0x5)
Modified: lld/trunk/test/ELF/basic32.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/basic32.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/basic32.s (original)
+++ lld/trunk/test/ELF/basic32.s Fri Sep 21 09:58:13 2018
@@ -23,7 +23,7 @@ _start:
# CHECK-NEXT: Type: Executable (0x2)
# CHECK-NEXT: Machine: EM_386 (0x3)
# CHECK-NEXT: Version: 1
-# CHECK-NEXT: Entry: 0x11000
+# CHECK-NEXT: Entry: 0x401000
# CHECK-NEXT: ProgramHeaderOffset: 0x34
# CHECK-NEXT: SectionHeaderOffset: 0x205C
# CHECK-NEXT: Flags [ (0x0)
@@ -58,7 +58,7 @@ _start:
# CHECK-NEXT: SHF_ALLOC (0x2)
# CHECK-NEXT: SHF_EXECINSTR (0x4)
# CHECK-NEXT: ]
-# CHECK-NEXT: Address: 0x11000
+# CHECK-NEXT: Address: 0x401000
# CHECK-NEXT: Offset: 0x1000
# CHECK-NEXT: Size: 12
# CHECK-NEXT: Link: 0
@@ -129,8 +129,8 @@ _start:
# CHECK-NEXT: ProgramHeader {
# CHECK-NEXT: Type: PT_PHDR (0x6)
# CHECK-NEXT: Offset: 0x34
-# CHECK-NEXT: VirtualAddress: 0x10034
-# CHECK-NEXT: PhysicalAddress: 0x10034
+# CHECK-NEXT: VirtualAddress: 0x400034
+# CHECK-NEXT: PhysicalAddress: 0x400034
# CHECK-NEXT: FileSize: 128
# CHECK-NEXT: MemSize: 128
# CHECK-NEXT: Flags [ (0x4)
@@ -141,8 +141,8 @@ _start:
# CHECK-NEXT: ProgramHeader {
# CHECK-NEXT: Type: PT_LOAD (0x1)
# CHECK-NEXT: Offset: 0x0
-# CHECK-NEXT: VirtualAddress: 0x10000
-# CHECK-NEXT: PhysicalAddress: 0x10000
+# CHECK-NEXT: VirtualAddress: 0x400000
+# CHECK-NEXT: PhysicalAddress: 0x400000
# CHECK-NEXT: FileSize: 180
# CHECK-NEXT: MemSize: 180
# CHECK-NEXT: Flags [
@@ -153,8 +153,8 @@ _start:
# CHECK-NEXT: ProgramHeader {
# CHECK-NEXT: Type: PT_LOAD (0x1)
# CHECK-NEXT: Offset: 0x1000
-# CHECK-NEXT: VirtualAddress: 0x11000
-# CHECK-NEXT: PhysicalAddress: 0x11000
+# CHECK-NEXT: VirtualAddress: 0x401000
+# CHECK-NEXT: PhysicalAddress: 0x401000
# CHECK-NEXT: FileSize: 4096
# CHECK-NEXT: MemSize: 4096
# CHECK-NEXT: Flags [ (0x5)
Modified: lld/trunk/test/ELF/gc-sections-implicit-addend.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/gc-sections-implicit-addend.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/gc-sections-implicit-addend.s (original)
+++ lld/trunk/test/ELF/gc-sections-implicit-addend.s Fri Sep 21 09:58:13 2018
@@ -12,10 +12,10 @@
# CHECK-NEXT: SHF_MERGE
# CHECK-NEXT: SHF_STRINGS
# CHECK-NEXT: ]
-# CHECK-NEXT: Address: 0x100B4
+# CHECK-NEXT: Address: 0x4000B4
-# 0x100B4 == 65716
-# DISASM: leal 65716, %eax
+# 0x4000B4 == 4194484
+# DISASM: leal 4194484, %eax
.section .foo,"aMS", at progbits,1
.byte 0
Modified: lld/trunk/test/ELF/gnu-ifunc-i386.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/gnu-ifunc-i386.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/gnu-ifunc-i386.s (original)
+++ lld/trunk/test/ELF/gnu-ifunc-i386.s Fri Sep 21 09:58:13 2018
@@ -22,8 +22,8 @@
// CHECK-NEXT: }
// CHECK: Relocations [
// CHECK-NEXT: Section ({{.*}}) .rel.plt {
-// CHECK-NEXT: 0x12000 R_386_IRELATIVE
-// CHECK-NEXT: 0x12004 R_386_IRELATIVE
+// CHECK-NEXT: 0x402000 R_386_IRELATIVE
+// CHECK-NEXT: 0x402004 R_386_IRELATIVE
// CHECK-NEXT: }
// CHECK-NEXT: ]
@@ -39,7 +39,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: __rel_iplt_end
-// CHECK-NEXT: Value: 0x100E4
+// CHECK-NEXT: Value: 0x4000E4
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Local
// CHECK-NEXT: Type: None
@@ -61,7 +61,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: _start
-// CHECK-NEXT: Value: 0x11002
+// CHECK-NEXT: Value: 0x401002
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: None
@@ -70,7 +70,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: bar
-// CHECK-NEXT: Value: 0x11001
+// CHECK-NEXT: Value: 0x401001
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: GNU_IFunc
@@ -79,7 +79,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: foo
-// CHECK-NEXT: Value: 0x11000
+// CHECK-NEXT: Value: 0x401000
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: GNU_IFunc
@@ -90,22 +90,22 @@
// DISASM: Disassembly of section .text:
// DISASM-NEXT: foo:
-// DISASM-NEXT: 11000: c3 retl
+// DISASM-NEXT: 401000: c3 retl
// DISASM: bar:
-// DISASM-NEXT: 11001: c3 retl
+// DISASM-NEXT: 401001: c3 retl
// DISASM: _start:
-// DISASM-NEXT: 11002: e8 19 00 00 00 calll 25
-// DISASM-NEXT: 11007: e8 24 00 00 00 calll 36
-// DISASM-NEXT: 1100c: ba d4 00 01 00 movl $65748, %edx
-// DISASM-NEXT: 11011: ba e4 00 01 00 movl $65764, %edx
+// DISASM-NEXT: 401002: e8 19 00 00 00 calll 25
+// DISASM-NEXT: 401007: e8 24 00 00 00 calll 36
+// DISASM-NEXT: 40100c: ba d4 00 40 00 movl $4194516, %edx
+// DISASM-NEXT: 401011: ba e4 00 40 00 movl $4194532, %edx
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-NEXT: .plt:
-// DISASM-NEXT: 11020: ff 25 00 20 01 00 jmpl *73728
-// DISASM-NEXT: 11026: 68 10 00 00 00 pushl $16
-// DISASM-NEXT: 1102b: e9 e0 ff ff ff jmp -32 <_start+0xe>
-// DISASM-NEXT: 11030: ff 25 04 20 01 00 jmpl *73732
-// DISASM-NEXT: 11036: 68 18 00 00 00 pushl $24
-// DISASM-NEXT: 1103b: e9 d0 ff ff ff jmp -48 <_start+0xe>
+// DISASM-NEXT: 401020: ff 25 00 20 40 00 jmpl *4202496
+// DISASM-NEXT: 401026: 68 10 00 00 00 pushl $16
+// DISASM-NEXT: 40102b: e9 e0 ff ff ff jmp -32 <_start+0xe>
+// DISASM-NEXT: 401030: ff 25 04 20 40 00 jmpl *4202500
+// DISASM-NEXT: 401036: 68 18 00 00 00 pushl $24
+// DISASM-NEXT: 40103b: e9 d0 ff ff ff jmp -48 <_start+0xe>
.text
.type foo STT_GNU_IFUNC
Modified: lld/trunk/test/ELF/gnu-ifunc-plt-i386.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/gnu-ifunc-plt-i386.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/gnu-ifunc-plt-i386.s (original)
+++ lld/trunk/test/ELF/gnu-ifunc-plt-i386.s Fri Sep 21 09:58:13 2018
@@ -10,16 +10,16 @@
// Check that the IRELATIVE relocations are after the JUMP_SLOT in the plt
// CHECK: Relocations [
// CHECK-NEXT: Section (4) .rel.plt {
-// CHECK-NEXT: 0x1200C R_386_JUMP_SLOT bar2
-// CHECK-NEXT: 0x12010 R_386_JUMP_SLOT zed2
-// CHECK-NEXT: 0x12014 R_386_IRELATIVE
-// CHECK-NEXT: 0x12018 R_386_IRELATIVE
+// CHECK-NEXT: 0x40200C R_386_JUMP_SLOT bar2
+// CHECK-NEXT: 0x402010 R_386_JUMP_SLOT zed2
+// CHECK-NEXT: 0x402014 R_386_IRELATIVE
+// CHECK-NEXT: 0x402018 R_386_IRELATIVE
// Check that IRELATIVE .got.plt entries point to ifunc resolver and not
// back to the plt entry + 6.
// GOTPLT: Contents of section .got.plt:
-// GOTPLT: 12000 00300100 00000000 00000000 36100100
-// GOTPLT-NEXT: 12010 46100100 00100100 01100100
+// GOTPLT: 402000 00304000 00000000 00000000 36104000
+// GOTPLT-NEXT: 402010 46104000 00104000 01104000
// Check that the PLTRELSZ tag includes the IRELATIVE relocations
// CHECK: DynamicSection [
@@ -28,38 +28,38 @@
// Check that a PLT header is written and the ifunc entries appear last
// DISASM: Disassembly of section .text:
// DISASM-NEXT: foo:
-// DISASM-NEXT: 11000: c3 retl
+// DISASM-NEXT: 401000: c3 retl
// DISASM: bar:
-// DISASM-NEXT: 11001: c3 retl
+// DISASM-NEXT: 401001: c3 retl
// DISASM: _start:
-// DISASM-NEXT: 11002: e8 49 00 00 00 calll 73
-// DISASM-NEXT: 11007: e8 54 00 00 00 calll 84
-// DISASM-NEXT: 1100c: e8 1f 00 00 00 calll 31
-// DISASM-NEXT: 11011: e8 2a 00 00 00 calll 42
+// DISASM-NEXT: 401002: e8 49 00 00 00 calll 73
+// DISASM-NEXT: 401007: e8 54 00 00 00 calll 84
+// DISASM-NEXT: 40100c: e8 1f 00 00 00 calll 31
+// DISASM-NEXT: 401011: e8 2a 00 00 00 calll 42
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-NEXT: .plt:
-// DISASM-NEXT: 11020: ff 35 04 20 01 00 pushl 73732
-// DISASM-NEXT: 11026: ff 25 08 20 01 00 jmpl *73736
-// DISASM-NEXT: 1102c: 90 nop
-// DISASM-NEXT: 1102d: 90 nop
-// DISASM-NEXT: 1102e: 90 nop
-// DISASM-NEXT: 1102f: 90 nop
+// DISASM-NEXT: 401020: ff 35 04 20 40 00 pushl 4202500
+// DISASM-NEXT: 401026: ff 25 08 20 40 00 jmpl *4202504
+// DISASM-NEXT: 40102c: 90 nop
+// DISASM-NEXT: 40102d: 90 nop
+// DISASM-NEXT: 40102e: 90 nop
+// DISASM-NEXT: 40102f: 90 nop
// DISASM-EMPTY:
// DISASM-NEXT: bar2 at plt:
-// DISASM-NEXT: 11030: ff 25 0c 20 01 00 jmpl *73740
-// DISASM-NEXT: 11036: 68 00 00 00 00 pushl $0
-// DISASM-NEXT: 1103b: e9 e0 ff ff ff jmp -32 <.plt>
+// DISASM-NEXT: 401030: ff 25 0c 20 40 00 jmpl *4202508
+// DISASM-NEXT: 401036: 68 00 00 00 00 pushl $0
+// DISASM-NEXT: 40103b: e9 e0 ff ff ff jmp -32 <.plt>
// DISASM-EMPTY:
// DISASM-NEXT: zed2 at plt:
-// DISASM-NEXT: 11040: ff 25 10 20 01 00 jmpl *73744
-// DISASM-NEXT: 11046: 68 08 00 00 00 pushl $8
-// DISASM-NEXT: 1104b: e9 d0 ff ff ff jmp -48 <.plt>
-// DISASM-NEXT: 11050: ff 25 14 20 01 00 jmpl *73748
-// DISASM-NEXT: 11056: 68 30 00 00 00 pushl $48
-// DISASM-NEXT: 1105b: e9 e0 ff ff ff jmp -32 <zed2 at plt>
-// DISASM-NEXT: 11060: ff 25 18 20 01 00 jmpl *73752
-// DISASM-NEXT: 11066: 68 38 00 00 00 pushl $56
-// DISASM-NEXT: 1106b: e9 d0 ff ff ff jmp -48 <zed2 at plt>
+// DISASM-NEXT: 401040: ff 25 10 20 40 00 jmpl *4202512
+// DISASM-NEXT: 401046: 68 08 00 00 00 pushl $8
+// DISASM-NEXT: 40104b: e9 d0 ff ff ff jmp -48 <.plt>
+// DISASM-NEXT: 401050: ff 25 14 20 40 00 jmpl *4202516
+// DISASM-NEXT: 401056: 68 30 00 00 00 pushl $48
+// DISASM-NEXT: 40105b: e9 e0 ff ff ff jmp -32 <zed2 at plt>
+// DISASM-NEXT: 401060: ff 25 18 20 40 00 jmpl *4202520
+// DISASM-NEXT: 401066: 68 38 00 00 00 pushl $56
+// DISASM-NEXT: 40106b: e9 d0 ff ff ff jmp -48 <zed2 at plt>
.text
.type foo STT_GNU_IFUNC
Modified: lld/trunk/test/ELF/got-i386.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/got-i386.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/got-i386.s (original)
+++ lld/trunk/test/ELF/got-i386.s Fri Sep 21 09:58:13 2018
@@ -10,7 +10,7 @@
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x12000
+// CHECK-NEXT: Address: 0x402000
// CHECK-NEXT: Offset:
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Link:
@@ -19,7 +19,7 @@
// CHECK: Symbol {
// CHECK: Name: bar
-// CHECK-NEXT: Value: 0x12000
+// CHECK-NEXT: Value: 0x402000
// CHECK-NEXT: Size: 10
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
@@ -28,7 +28,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: obj
-// CHECK-NEXT: Value: 0x1200A
+// CHECK-NEXT: Value: 0x40200A
// CHECK-NEXT: Size: 10
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
@@ -36,14 +36,14 @@
// CHECK-NEXT: Section: .bss
// CHECK-NEXT: }
-// 0x12000 - 0 = addr(.got) = 0x12000
-// 0x1200A - 10 = addr(.got) = 0x12000
-// 0x1200A + 5 - 15 = addr(.got) = 0x12000
+// 0x402000 - 0 = addr(.got) = 0x402000
+// 0x40200A - 10 = addr(.got) = 0x402000
+// 0x40200A + 5 - 15 = addr(.got) = 0x402000
// DISASM: Disassembly of section .text:
// DISASM-NEXT: _start:
-// DISASM-NEXT: 11000: c7 81 00 00 00 00 01 00 00 00 movl $1, (%ecx)
-// DISASM-NEXT: 1100a: c7 81 0a 00 00 00 02 00 00 00 movl $2, 10(%ecx)
-// DISASM-NEXT: 11014: c7 81 0f 00 00 00 03 00 00 00 movl $3, 15(%ecx)
+// DISASM-NEXT: 401000: c7 81 00 00 00 00 01 00 00 00 movl $1, (%ecx)
+// DISASM-NEXT: 40100a: c7 81 0a 00 00 00 02 00 00 00 movl $2, 10(%ecx)
+// DISASM-NEXT: 401014: c7 81 0f 00 00 00 03 00 00 00 movl $3, 15(%ecx)
.global _start
_start:
Modified: lld/trunk/test/ELF/got32-i386.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/got32-i386.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/got32-i386.s (original)
+++ lld/trunk/test/ELF/got32-i386.s Fri Sep 21 09:58:13 2018
@@ -14,10 +14,10 @@ _start:
## 73728 == 0x12000 == ADDR(.got)
# CHECK: _start:
-# CHECK-NEXT: 11001: 8b 1d {{.*}} movl 73728, %ebx
+# CHECK-NEXT: 401001: 8b 1d {{.*}} movl 4202496, %ebx
# CHECK: Sections:
# CHECK: Name Size Address
-# CHECK: .got 00000004 0000000000012000
+# CHECK: .got 00000004 0000000000402000
# RUN: not ld.lld %t.o -o %t -pie 2>&1 | FileCheck %s --check-prefix=ERR
# ERR: error: can't create dynamic relocation R_386_GOT32 against symbol: foo in readonly segment; recompile object files with -fPIC or pass '-Wl,-z,notext' to allow text relocations in the output
Modified: lld/trunk/test/ELF/got32x-i386.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/got32x-i386.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/got32x-i386.s (original)
+++ lld/trunk/test/ELF/got32x-i386.s Fri Sep 21 09:58:13 2018
@@ -33,13 +33,13 @@
## 73728 == 0x12000 == ADDR(.got)
# CHECK: _start:
-# CHECK-NEXT: 11001: 8b 05 {{.*}} movl 77824, %eax
-# CHECK-NEXT: 11007: 8b 1d {{.*}} movl 77824, %ebx
-# CHECK-NEXT: 1100d: 8b 80 {{.*}} movl -4(%eax), %eax
-# CHECK-NEXT: 11013: 8b 83 {{.*}} movl -4(%ebx), %eax
+# CHECK-NEXT: 401001: 8b 05 {{.*}} movl 4206592, %eax
+# CHECK-NEXT: 401007: 8b 1d {{.*}} movl 4206592, %ebx
+# CHECK-NEXT: 40100d: 8b 80 {{.*}} movl -4(%eax), %eax
+# CHECK-NEXT: 401013: 8b 83 {{.*}} movl -4(%ebx), %eax
# CHECK: Sections:
# CHECK: Name Size Address
-# CHECK: .got 00000004 0000000000013000
+# CHECK: .got 00000004 0000000000403000
# RUN: not ld.lld %S/Inputs/i386-got32x-baseless.elf -o %t1 -pie 2>&1 | \
# RUN: FileCheck %s --check-prefix=ERR
Modified: lld/trunk/test/ELF/i386-pc8-pc16-addend.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/i386-pc8-pc16-addend.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/i386-pc8-pc16-addend.s (original)
+++ lld/trunk/test/ELF/i386-pc8-pc16-addend.s Fri Sep 21 09:58:13 2018
@@ -4,11 +4,11 @@
# RUN: ld.lld %t1.o -o %t.out
# RUN: llvm-objdump -s -t %t.out | FileCheck %s
# CHECK: Contents of section .text:
-# CHECK-NEXT: 11000 020000
-## 0x11003 - 0x11000 + addend(-1) = 0x02
-## 0x11003 - 0x11001 + addend(-2) = 0x0000
+# CHECK-NEXT: 401000 020000
+## 0x401003 - 0x401000 + addend(-1) = 0x02
+## 0x401003 - 0x401001 + addend(-2) = 0x0000
# CHECK: SYMBOL TABLE:
-# CHECK: 00011003 .und
+# CHECK: 00401003 .und
.byte und-.-1
.short und-.-2
Modified: lld/trunk/test/ELF/i386-retpoline-nopic.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/i386-retpoline-nopic.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/i386-retpoline-nopic.s (original)
+++ lld/trunk/test/ELF/i386-retpoline-nopic.s Fri Sep 21 09:58:13 2018
@@ -8,56 +8,56 @@
// CHECK: Disassembly of section .plt:
// CHECK-NEXT: .plt:
-// CHECK-NEXT: 11010: ff 35 04 20 01 00 pushl 73732
-// CHECK-NEXT: 11016: 50 pushl %eax
-// CHECK-NEXT: 11017: a1 08 20 01 00 movl 73736, %eax
-// CHECK-NEXT: 1101c: e8 0f 00 00 00 calll 15 <.plt+0x20>
-// CHECK-NEXT: 11021: f3 90 pause
-// CHECK-NEXT: 11023: 0f ae e8 lfence
-// CHECK-NEXT: 11026: eb f9 jmp -7 <.plt+0x11>
-// CHECK-NEXT: 11028: cc int3
-// CHECK-NEXT: 11029: cc int3
-// CHECK-NEXT: 1102a: cc int3
-// CHECK-NEXT: 1102b: cc int3
-// CHECK-NEXT: 1102c: cc int3
-// CHECK-NEXT: 1102d: cc int3
-// CHECK-NEXT: 1102e: cc int3
-// CHECK-NEXT: 1102f: cc int3
-// CHECK-NEXT: 11030: 89 0c 24 movl %ecx, (%esp)
-// CHECK-NEXT: 11033: 8b 4c 24 04 movl 4(%esp), %ecx
-// CHECK-NEXT: 11037: 89 44 24 04 movl %eax, 4(%esp)
-// CHECK-NEXT: 1103b: 89 c8 movl %ecx, %eax
-// CHECK-NEXT: 1103d: 59 popl %ecx
-// CHECK-NEXT: 1103e: c3 retl
-// CHECK-NEXT: 1103f: cc int3
-// CHECK-NEXT: 11040: 50 pushl %eax
-// CHECK-NEXT: 11041: a1 0c 20 01 00 movl 73740, %eax
-// CHECK-NEXT: 11046: e8 e5 ff ff ff calll -27 <.plt+0x20>
-// CHECK-NEXT: 1104b: e9 d1 ff ff ff jmp -47 <.plt+0x11>
-// CHECK-NEXT: 11050: 68 00 00 00 00 pushl $0
-// CHECK-NEXT: 11055: e9 b6 ff ff ff jmp -74 <.plt>
-// CHECK-NEXT: 1105a: cc int3
-// CHECK-NEXT: 1105b: cc int3
-// CHECK-NEXT: 1105c: cc int3
-// CHECK-NEXT: 1105d: cc int3
-// CHECK-NEXT: 1105e: cc int3
-// CHECK-NEXT: 1105f: cc int3
-// CHECK-NEXT: 11060: 50 pushl %eax
-// CHECK-NEXT: 11061: a1 10 20 01 00 movl 73744, %eax
-// CHECK-NEXT: 11066: e8 c5 ff ff ff calll -59 <.plt+0x20>
-// CHECK-NEXT: 1106b: e9 b1 ff ff ff jmp -79 <.plt+0x11>
-// CHECK-NEXT: 11070: 68 08 00 00 00 pushl $8
-// CHECK-NEXT: 11075: e9 96 ff ff ff jmp -106 <.plt>
-// CHECK-NEXT: 1107a: cc int3
-// CHECK-NEXT: 1107b: cc int3
-// CHECK-NEXT: 1107c: cc int3
-// CHECK-NEXT: 1107d: cc int3
-// CHECK-NEXT: 1107e: cc int3
-// CHECK-NEXT: 1107f: cc int3
+// CHECK-NEXT: 401010: ff 35 04 20 40 00 pushl 4202500
+// CHECK-NEXT: 401016: 50 pushl %eax
+// CHECK-NEXT: 401017: a1 08 20 40 00 movl 4202504, %eax
+// CHECK-NEXT: 40101c: e8 0f 00 00 00 calll 15 <.plt+0x20>
+// CHECK-NEXT: 401021: f3 90 pause
+// CHECK-NEXT: 401023: 0f ae e8 lfence
+// CHECK-NEXT: 401026: eb f9 jmp -7 <.plt+0x11>
+// CHECK-NEXT: 401028: cc int3
+// CHECK-NEXT: 401029: cc int3
+// CHECK-NEXT: 40102a: cc int3
+// CHECK-NEXT: 40102b: cc int3
+// CHECK-NEXT: 40102c: cc int3
+// CHECK-NEXT: 40102d: cc int3
+// CHECK-NEXT: 40102e: cc int3
+// CHECK-NEXT: 40102f: cc int3
+// CHECK-NEXT: 401030: 89 0c 24 movl %ecx, (%esp)
+// CHECK-NEXT: 401033: 8b 4c 24 04 movl 4(%esp), %ecx
+// CHECK-NEXT: 401037: 89 44 24 04 movl %eax, 4(%esp)
+// CHECK-NEXT: 40103b: 89 c8 movl %ecx, %eax
+// CHECK-NEXT: 40103d: 59 popl %ecx
+// CHECK-NEXT: 40103e: c3 retl
+// CHECK-NEXT: 40103f: cc int3
+// CHECK-NEXT: 401040: 50 pushl %eax
+// CHECK-NEXT: 401041: a1 0c 20 40 00 movl 4202508, %eax
+// CHECK-NEXT: 401046: e8 e5 ff ff ff calll -27 <.plt+0x20>
+// CHECK-NEXT: 40104b: e9 d1 ff ff ff jmp -47 <.plt+0x11>
+// CHECK-NEXT: 401050: 68 00 00 00 00 pushl $0
+// CHECK-NEXT: 401055: e9 b6 ff ff ff jmp -74 <.plt>
+// CHECK-NEXT: 40105a: cc int3
+// CHECK-NEXT: 40105b: cc int3
+// CHECK-NEXT: 40105c: cc int3
+// CHECK-NEXT: 40105d: cc int3
+// CHECK-NEXT: 40105e: cc int3
+// CHECK-NEXT: 40105f: cc int3
+// CHECK-NEXT: 401060: 50 pushl %eax
+// CHECK-NEXT: 401061: a1 10 20 40 00 movl 4202512, %eax
+// CHECK-NEXT: 401066: e8 c5 ff ff ff calll -59 <.plt+0x20>
+// CHECK-NEXT: 40106b: e9 b1 ff ff ff jmp -79 <.plt+0x11>
+// CHECK-NEXT: 401070: 68 08 00 00 00 pushl $8
+// CHECK-NEXT: 401075: e9 96 ff ff ff jmp -106 <.plt>
+// CHECK-NEXT: 40107a: cc int3
+// CHECK-NEXT: 40107b: cc int3
+// CHECK-NEXT: 40107c: cc int3
+// CHECK-NEXT: 40107d: cc int3
+// CHECK-NEXT: 40107e: cc int3
+// CHECK-NEXT: 40107f: cc int3
// CHECK: Contents of section .got.plt:
-// CHECK-NEXT: 00300100 00000000 00000000 50100100
-// CHECK-NEXT: 70100100
+// CHECK-NEXT: 00304000 00000000 00000000 50104000
+// CHECK-NEXT: 70104000
.global _start
_start:
Modified: lld/trunk/test/ELF/map-file-i686.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/map-file-i686.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/map-file-i686.s (original)
+++ lld/trunk/test/ELF/map-file-i686.s Fri Sep 21 09:58:13 2018
@@ -7,15 +7,15 @@
_start:
nop
-// CHECK: VMA LMA Size Align Out In Symbol
-// CHECK-NEXT: 11000 11000 1 4 .text
-// CHECK-NEXT: 11000 11000 1 4 {{.*}}{{/|\\}}map-file-i686.s.tmp1.o:(.text)
-// CHECK-NEXT: 11000 11000 0 1 _start
-// CHECK-NEXT: 0 0 8 1 .comment
-// CHECK-NEXT: 0 0 8 1 <internal>:(.comment)
-// CHECK-NEXT: 0 0 20 4 .symtab
-// CHECK-NEXT: 0 0 20 4 <internal>:(.symtab)
-// CHECK-NEXT: 0 0 2a 1 .shstrtab
-// CHECK-NEXT: 0 0 2a 1 <internal>:(.shstrtab)
-// CHECK-NEXT: 0 0 8 1 .strtab
-// CHECK-NEXT: 0 0 8 1 <internal>:(.strtab)
+// CHECK: VMA LMA Size Align Out In Symbol
+// CHECK-NEXT: 401000 401000 1 4 .text
+// CHECK-NEXT: 401000 401000 1 4 {{.*}}{{/|\\}}map-file-i686.s.tmp1.o:(.text)
+// CHECK-NEXT: 401000 401000 0 1 _start
+// CHECK-NEXT: 0 0 8 1 .comment
+// CHECK-NEXT: 0 0 8 1 <internal>:(.comment)
+// CHECK-NEXT: 0 0 20 4 .symtab
+// CHECK-NEXT: 0 0 20 4 <internal>:(.symtab)
+// CHECK-NEXT: 0 0 2a 1 .shstrtab
+// CHECK-NEXT: 0 0 2a 1 <internal>:(.shstrtab)
+// CHECK-NEXT: 0 0 8 1 .strtab
+// CHECK-NEXT: 0 0 8 1 <internal>:(.strtab)
Modified: lld/trunk/test/ELF/plt-aarch64.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/plt-aarch64.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/plt-aarch64.s (original)
+++ lld/trunk/test/ELF/plt-aarch64.s Fri Sep 21 09:58:13 2018
@@ -119,7 +119,7 @@
// CHECKEXE-NEXT: SHF_ALLOC
// CHECKEXE-NEXT: SHF_EXECINSTR
// CHECKEXE-NEXT: ]
-// CHECKEXE-NEXT: Address: 0x20010
+// CHECKEXE-NEXT: Address: 0x210010
// CHECKEXE-NEXT: Offset:
// CHECKEXE-NEXT: Size: 64
// CHECKEXE-NEXT: Link:
@@ -132,7 +132,7 @@
// CHECKEXE-NEXT: SHF_ALLOC
// CHECKEXE-NEXT: SHF_WRITE
// CHECKEXE-NEXT: ]
-// CHECKEXE-NEXT: Address: 0x30000
+// CHECKEXE-NEXT: Address: 0x220000
// CHECKEXE-NEXT: Offset:
// CHECKEXE-NEXT: Size: 40
// CHECKEXE-NEXT: Link:
@@ -142,63 +142,63 @@
// CHECKEXE: Relocations [
// CHECKEXE-NEXT: Section ({{.*}}) .rela.plt {
-// &(.got.plt[3]) = 0x30000 + 3 * 8 = 0x30018
-// CHECKEXE-NEXT: 0x30018 R_AARCH64_JUMP_SLOT bar 0x0
+// &(.got.plt[3]) = 0x220000 + 3 * 8 = 0x220018
+// CHECKEXE-NEXT: 0x220018 R_AARCH64_JUMP_SLOT bar 0x0
-// &(.got.plt[4]) = 0x30000 + 4 * 8 = 0x30020
-// CHECKEXE-NEXT: 0x30020 R_AARCH64_JUMP_SLOT weak 0x0
+// &(.got.plt[4]) = 0x220000 + 4 * 8 = 0x220020
+// CHECKEXE-NEXT: 0x220020 R_AARCH64_JUMP_SLOT weak 0x0
// CHECKEXE-NEXT: }
// CHECKEXE-NEXT: ]
// DUMPEXE: Contents of section .got.plt:
// .got.plt[0..2] = 0 (reserved)
// .got.plt[3..4] = .plt = 0x40010
-// DUMPEXE-NEXT: 30000 00000000 00000000 00000000 00000000 ................
-// DUMPEXE-NEXT: 30010 00000000 00000000 10000200 00000000 ................
-// DUMPEXE-NEXT: 30020 10000200 00000000 ........
+// DUMPEXE-NEXT: 220000 00000000 00000000 00000000 00000000
+// DUMPEXE-NEXT: 220010 00000000 00000000 10002100 00000000
+// DUMPEXE-NEXT: 220020 10002100 00000000
// DISASMEXE: _start:
-// 0x2000c - 0x20000 = 0xc = 12
-// DISASMEXE-NEXT: 20000: 03 00 00 14 b #12
-// 0x20030 - 0x20004 = 0x2c = 44
-// DISASMEXE-NEXT: 20004: 0b 00 00 14 b #44
-// 0x20040 - 0x20008 = 0x38 = 56
-// DISASMEXE-NEXT: 20008: 0e 00 00 14 b #56
+// 0x21000c - 0x210000 = 0xc = 12
+// DISASMEXE-NEXT: 210000: 03 00 00 14 b #12
+// 0x210030 - 0x210004 = 0x2c = 44
+// DISASMEXE-NEXT: 210004: 0b 00 00 14 b #44
+// 0x210040 - 0x210008 = 0x38 = 56
+// DISASMEXE-NEXT: 210008: 0e 00 00 14 b #56
// DISASMEXE: foo:
-// DISASMEXE-NEXT: 2000c: 1f 20 03 d5 nop
+// DISASMEXE-NEXT: 21000c: 1f 20 03 d5 nop
// DISASMEXE: Disassembly of section .plt:
// DISASMEXE-NEXT: .plt:
-// DISASMEXE-NEXT: 20010: f0 7b bf a9 stp x16, x30, [sp, #-16]!
-// &(.got.plt[2]) = 0x300B0 + 2 * 8 = 0x300C0
-// Page(0x30010) - Page(0x20014) = 0x30000 - 0x20000 = 0x10000 = 65536
-// DISASMEXE-NEXT: 20014: 90 00 00 90 adrp x16, #65536
+// DISASMEXE-NEXT: 210010: f0 7b bf a9 stp x16, x30, [sp, #-16]!
+// &(.got.plt[2]) = 0x2200B0 + 2 * 8 = 0x2200C0
+// Page(0x220010) - Page(0x210014) = 0x220000 - 0x210000 = 0x10000 = 65536
+// DISASMEXE-NEXT: 210014: 90 00 00 90 adrp x16, #65536
// 0x120c0 & 0xFFF = 0xC0 = 192
-// DISASMEXE-NEXT: 20018: 11 0a 40 f9 ldr x17, [x16, #16]
-// DISASMEXE-NEXT: 2001c: 10 42 00 91 add x16, x16, #16
-// DISASMEXE-NEXT: 20020: 20 02 1f d6 br x17
-// DISASMEXE-NEXT: 20024: 1f 20 03 d5 nop
-// DISASMEXE-NEXT: 20028: 1f 20 03 d5 nop
-// DISASMEXE-NEXT: 2002c: 1f 20 03 d5 nop
+// DISASMEXE-NEXT: 210018: 11 0a 40 f9 ldr x17, [x16, #16]
+// DISASMEXE-NEXT: 21001c: 10 42 00 91 add x16, x16, #16
+// DISASMEXE-NEXT: 210020: 20 02 1f d6 br x17
+// DISASMEXE-NEXT: 210024: 1f 20 03 d5 nop
+// DISASMEXE-NEXT: 210028: 1f 20 03 d5 nop
+// DISASMEXE-NEXT: 21002c: 1f 20 03 d5 nop
// bar at plt
-// Page(0x40018) - Page(0x20030) = 0x30000 - 0x20000 = 0x10000 = 65536
+// Page(0x40018) - Page(0x210030) = 0x220000 - 0x210000 = 0x10000 = 65536
// DISASMEXE-EMPTY:
// DISASMEXE-NEXT: bar at plt:
-// DISASMEXE-NEXT: 20030: 90 00 00 90 adrp x16, #65536
-// DISASMEXE-NEXT: 20034: 11 0e 40 f9 ldr x17, [x16, #24]
-// DISASMEXE-NEXT: 20038: 10 62 00 91 add x16, x16, #24
-// DISASMEXE-NEXT: 2003c: 20 02 1f d6 br x17
+// DISASMEXE-NEXT: 210030: 90 00 00 90 adrp x16, #65536
+// DISASMEXE-NEXT: 210034: 11 0e 40 f9 ldr x17, [x16, #24]
+// DISASMEXE-NEXT: 210038: 10 62 00 91 add x16, x16, #24
+// DISASMEXE-NEXT: 21003c: 20 02 1f d6 br x17
// weak at plt
-// Page(0x40020) - Page(0x20040) = 0x30000 - 0x20000 = 0x10000 = 65536
+// Page(0x40020) - Page(0x210040) = 0x220000 - 0x210000 = 0x10000 = 65536
// DISASMEXE-EMPTY:
// DISASMEXE-NEXT: weak at plt:
-// DISASMEXE-NEXT: 20040: 90 00 00 90 adrp x16, #65536
-// DISASMEXE-NEXT: 20044: 11 12 40 f9 ldr x17, [x16, #32]
-// DISASMEXE-NEXT: 20048: 10 82 00 91 add x16, x16, #32
-// DISASMEXE-NEXT: 2004c: 20 02 1f d6 br x17
+// DISASMEXE-NEXT: 210040: 90 00 00 90 adrp x16, #65536
+// DISASMEXE-NEXT: 210044: 11 12 40 f9 ldr x17, [x16, #32]
+// DISASMEXE-NEXT: 210048: 10 82 00 91 add x16, x16, #32
+// DISASMEXE-NEXT: 21004c: 20 02 1f d6 br x17
.global _start,foo,bar
.weak weak
Modified: lld/trunk/test/ELF/plt-i686.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/plt-i686.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/plt-i686.s (original)
+++ lld/trunk/test/ELF/plt-i686.s Fri Sep 21 09:58:13 2018
@@ -17,7 +17,7 @@
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_EXECINSTR
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x11020
+// CHECK-NEXT: Address: 0x401020
// CHECK-NEXT: Offset:
// CHECK-NEXT: Size: 48
// CHECK-NEXT: Link: 0
@@ -30,7 +30,7 @@
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x12000
+// CHECK-NEXT: Address: 0x402000
// CHECK-NEXT: Offset: 0x2000
// CHECK-NEXT: Size: 20
// CHECK-NEXT: Link: 0
@@ -42,8 +42,8 @@
// 0x12000 + got.plt.reserved(12) + 4 = 0x12010
// CHECK: Relocations [
// CHECK-NEXT: Section ({{.*}}) .rel.plt {
-// CHECK-NEXT: 0x1200C R_386_JUMP_SLOT bar 0x0
-// CHECK-NEXT: 0x12010 R_386_JUMP_SLOT zed 0x0
+// CHECK-NEXT: 0x40200C R_386_JUMP_SLOT bar 0x0
+// CHECK-NEXT: 0x402010 R_386_JUMP_SLOT zed 0x0
// CHECK-NEXT: }
// CHECK-NEXT: ]
@@ -51,44 +51,44 @@
// values:
// 16 is the size of PLT[0]
-// (0x11010 + 16) - (0x11000 + 1) - 4 = 27
-// (0x11010 + 16) - (0x11005 + 1) - 4 = 22
-// (0x11020 + 16) - (0x1100a + 1) - 4 = 33
+// (0x401010 + 16) - (0x401000 + 1) - 4 = 27
+// (0x401010 + 16) - (0x401005 + 1) - 4 = 22
+// (0x401020 + 16) - (0x40100a + 1) - 4 = 33
// DISASM: local:
-// DISASM-NEXT: 11000: {{.*}}
-// DISASM-NEXT: 11002: {{.*}}
+// DISASM-NEXT: 401000: {{.*}}
+// DISASM-NEXT: 401002: {{.*}}
// DISASM: _start:
-// 0x11013 + 5 - 24 = 0x11000
-// DISASM-NEXT: 11004: e9 27 00 00 00 jmp 39
-// DISASM-NEXT: 11009: e9 22 00 00 00 jmp 34
-// DISASM-NEXT: 1100e: e9 2d 00 00 00 jmp 45
-// DISASM-NEXT: 11013: e9 e8 ff ff ff jmp -24
-
-// 0x11010 - 0x1102b - 5 = -32
-// 0x11010 - 0x1103b - 5 = -48
-// 77828 = 0x13004 = .got.plt (0x13000) + 4
-// 77832 = 0x13008 = .got.plt (0x13000) + 8
-// 77836 = 0x1300C = .got.plt (0x13000) + got.plt.reserved(12)
-// 77840 = 0x13010 = .got.plt (0x13000) + got.plt.reserved(12) + 4
+// 0x401013 + 5 - 24 = 0x401000
+// DISASM-NEXT: 401004: e9 27 00 00 00 jmp 39
+// DISASM-NEXT: 401009: e9 22 00 00 00 jmp 34
+// DISASM-NEXT: 40100e: e9 2d 00 00 00 jmp 45
+// DISASM-NEXT: 401013: e9 e8 ff ff ff jmp -24
+
+// 0x401010 - 0x40102b - 5 = -32
+// 0x401010 - 0x40103b - 5 = -48
+// 4202500 = 0x402004 = .got.plt (0x402000) + 4
+// 4202504 = 0x402008 = .got.plt (0x402000) + 8
+// 4202508 = 0x40200C = .got.plt (0x402000) + got.plt.reserved(12)
+// 4202512 = 0x402010 = .got.plt (0x402000) + got.plt.reserved(12) + 4
// DISASM: Disassembly of section .plt:
// DISASM-NEXT: .plt:
-// DISASM-NEXT: 11020: ff 35 04 20 01 00 pushl 73732
-// DISASM-NEXT: 11026: ff 25 08 20 01 00 jmpl *73736
-// DISASM-NEXT: 1102c: 90 nop
-// DISASM-NEXT: 1102d: 90 nop
-// DISASM-NEXT: 1102e: 90 nop
-// DISASM-NEXT: 1102f: 90 nop
+// DISASM-NEXT: 401020: ff 35 04 20 40 00 pushl 4202500
+// DISASM-NEXT: 401026: ff 25 08 20 40 00 jmpl *4202504
+// DISASM-NEXT: 40102c: 90 nop
+// DISASM-NEXT: 40102d: 90 nop
+// DISASM-NEXT: 40102e: 90 nop
+// DISASM-NEXT: 40102f: 90 nop
// DISASM-EMPTY:
// DISASM-NEXT: bar at plt:
-// DISASM-NEXT: 11030: ff 25 0c 20 01 00 jmpl *73740
-// DISASM-NEXT: 11036: 68 00 00 00 00 pushl $0
-// DISASM-NEXT: 1103b: e9 e0 ff ff ff jmp -32 <.plt>
+// DISASM-NEXT: 401030: ff 25 0c 20 40 00 jmpl *4202508
+// DISASM-NEXT: 401036: 68 00 00 00 00 pushl $0
+// DISASM-NEXT: 40103b: e9 e0 ff ff ff jmp -32 <.plt>
// DISASM-EMPTY:
// DISASM-NEXT: zed at plt:
-// DISASM-NEXT: 11040: ff 25 10 20 01 00 jmpl *73744
-// DISASM-NEXT: 11046: 68 08 00 00 00 pushl $8
-// DISASM-NEXT: 1104b: e9 d0 ff ff ff jmp -48 <.plt>
+// DISASM-NEXT: 401040: ff 25 10 20 40 00 jmpl *4202512
+// DISASM-NEXT: 401046: 68 08 00 00 00 pushl $8
+// DISASM-NEXT: 40104b: e9 d0 ff ff ff jmp -48 <.plt>
// CHECKSHARED: Name: .plt
// CHECKSHARED-NEXT: Type: SHT_PROGBITS
Modified: lld/trunk/test/ELF/relocation-b-aarch64.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/relocation-b-aarch64.test?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/relocation-b-aarch64.test (original)
+++ lld/trunk/test/ELF/relocation-b-aarch64.test Fri Sep 21 09:58:13 2018
@@ -9,9 +9,9 @@
# CHECK: Disassembly of section .text:
# CHECK-NEXT: foo:
-# CHECK-NEXT: 20000: 01 00 00 14 b #4
+# CHECK-NEXT: 210000: 01 00 00 14 b #4
# CHECK: bar:
-# CHECK-NEXT: 20004: ff ff ff 17 b #-4
+# CHECK-NEXT: 210004: ff ff ff 17 b #-4
!ELF
FileHeader:
Modified: lld/trunk/test/ELF/relocation-copy-i686.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/relocation-copy-i686.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/relocation-copy-i686.s (original)
+++ lld/trunk/test/ELF/relocation-copy-i686.s Fri Sep 21 09:58:13 2018
@@ -21,7 +21,7 @@ movl $9, z
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x13000
+// CHECK-NEXT: Address: 0x403000
// CHECK-NEXT: Offset:
// CHECK-NEXT: Size: 24
// CHECK-NEXT: Link: 0
@@ -52,12 +52,12 @@ movl $9, z
// CHECK-NEXT: }
// CHECK-NEXT: ]
-// 77824 = 0x13000
+// 4206592 = 0x403000
// 16 is alignment here
-// 77840 = 0x13000 + 16
-// 77844 = 0x13000 + 16 + 4
+// 4206608 = 0x403000 + 16
+// 4206612 = 0x403000 + 16 + 4
// CODE: Disassembly of section .text:
// CODE-NEXT: main:
-// CODE-NEXT: 11000: c7 05 00 30 01 00 05 00 00 00 movl $5, 77824
-// CODE-NEXT: 1100a: c7 05 10 30 01 00 07 00 00 00 movl $7, 77840
-// CODE-NEXT: 11014: c7 05 14 30 01 00 09 00 00 00 movl $9, 77844
+// CODE-NEXT: 401000: c7 05 00 30 40 00 05 00 00 00 movl $5, 4206592
+// CODE-NEXT: 40100a: c7 05 10 30 40 00 07 00 00 00 movl $7, 4206608
+// CODE-NEXT: 401014: c7 05 14 30 40 00 09 00 00 00 movl $9, 4206612
Modified: lld/trunk/test/ELF/relocation-i686.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/relocation-i686.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/relocation-i686.s (original)
+++ lld/trunk/test/ELF/relocation-i686.s Fri Sep 21 09:58:13 2018
@@ -27,14 +27,14 @@ R_386_PC32_2:
// CHECK: Disassembly of section .R_386_32:
// CHECK-NEXT: R_386_32:
-// CHECK-NEXT: 11000: {{.*}} movl $69633, %edx
+// CHECK-NEXT: 401000: {{.*}} movl $4198401, %edx
// CHECK: Disassembly of section .R_386_PC32:
// CHECK-NEXT: R_386_PC32:
-// CHECK-NEXT: 11005: e8 04 00 00 00 calll 4
+// CHECK-NEXT: 401005: e8 04 00 00 00 calll 4
// CHECK: R_386_PC32_2:
-// CHECK-NEXT: 1100e: 90 nop
+// CHECK-NEXT: 40100e: 90 nop
// Create a .got
movl bar at GOT, %eax
@@ -45,7 +45,7 @@ movl bar at GOT, %eax
// ADDR-NEXT: SHF_ALLOC
// ADDR-NEXT: SHF_EXECINSTR
// ADDR-NEXT: ]
-// ADDR-NEXT: Address: 0x11040
+// ADDR-NEXT: Address: 0x401040
// ADDR-NEXT: Offset: 0x1040
// ADDR-NEXT: Size: 32
@@ -55,7 +55,7 @@ movl bar at GOT, %eax
// ADDR-NEXT: SHF_ALLOC
// ADDR-NEXT: SHF_WRITE
// ADDR-NEXT: ]
-// ADDR-NEXT: Address: 0x13078
+// ADDR-NEXT: Address: 0x403078
// ADDR-NEXT: Offset:
// ADDR-NEXT: Size: 8
@@ -63,18 +63,18 @@ movl bar at GOT, %eax
R_386_GOTPC:
movl $_GLOBAL_OFFSET_TABLE_, %eax
-// 0x12078 + 8 - 0x11014 = 4204
+// 0x402078 + 8 - 0x401014 = 4204
// CHECK: Disassembly of section .R_386_GOTPC:
// CHECK-NEXT: R_386_GOTPC:
-// CHECK-NEXT: 11014: {{.*}} movl $8300, %eax
+// CHECK-NEXT: 401014: {{.*}} movl $8300, %eax
.section .dynamic_reloc, "ax", at progbits
call bar
-// addr(.plt) + 16 - (0x11019 + 5) = 50
+// addr(.plt) + 16 - (0x401019 + 5) = 50
// CHECK: Disassembly of section .dynamic_reloc:
// CHECK-NEXT: .dynamic_reloc:
-// CHECK-NEXT: 11019: e8 32 00 00 00 calll 50
+// CHECK-NEXT: 401019: e8 32 00 00 00 calll 50
.section .R_386_GOT32,"ax", at progbits
.global R_386_GOT32
@@ -84,13 +84,13 @@ R_386_GOT32:
movl bar+8 at GOT, %eax
movl zed+4 at GOT, %eax
-// 4294967288 = 0xFFFFFFF8 = got[0](0x12070) - .got(0x12070) - sizeof(.got)(8)
-// 4294967292 = 0xFFFFFFFC = got[1](0x12074) - .got(0x12070) - sizeof(.got)(8)
+// 4294967288 = 0xFFFFFFF8 = got[0](0x402070) - .got(0x402070) - sizeof(.got)(8)
+// 4294967292 = 0xFFFFFFFC = got[1](0x402074) - .got(0x402070) - sizeof(.got)(8)
// 0xFFFFFFF8 + 8 = 0
// 0xFFFFFFFC + 4 = 0
// CHECK: Disassembly of section .R_386_GOT32:
// CHECK-NEXT: R_386_GOT32:
-// CHECK-NEXT: 1101e: a1 f8 ff ff ff movl 4294967288, %eax
-// CHECK-NEXT: 11023: a1 fc ff ff ff movl 4294967292, %eax
-// CHECK-NEXT: 11028: a1 00 00 00 00 movl 0, %eax
-// CHECK-NEXT: 1102d: a1 00 00 00 00 movl 0, %eax
+// CHECK-NEXT: 40101e: a1 f8 ff ff ff movl 4294967288, %eax
+// CHECK-NEXT: 401023: a1 fc ff ff ff movl 4294967292, %eax
+// CHECK-NEXT: 401028: a1 00 00 00 00 movl 0, %eax
+// CHECK-NEXT: 40102d: a1 00 00 00 00 movl 0, %eax
Modified: lld/trunk/test/ELF/shared.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/shared.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/shared.s (original)
+++ lld/trunk/test/ELF/shared.s Fri Sep 21 09:58:13 2018
@@ -141,7 +141,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: _DYNAMIC
-// CHECK-NEXT: Value: 0x12000
+// CHECK-NEXT: Value: 0x402000
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Local
// CHECK-NEXT: Type: None
@@ -152,7 +152,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: _start
-// CHECK-NEXT: Value: 0x11000
+// CHECK-NEXT: Value: 0x401000
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: None
@@ -191,7 +191,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: _start@
-// CHECK-NEXT: Value: 0x11000
+// CHECK-NEXT: Value: 0x401000
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Non
Modified: lld/trunk/test/ELF/static-with-export-dynamic.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/static-with-export-dynamic.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/static-with-export-dynamic.s (original)
+++ lld/trunk/test/ELF/static-with-export-dynamic.s Fri Sep 21 09:58:13 2018
@@ -18,7 +18,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: _start
-// CHECK-NEXT: Value: 0x11000
+// CHECK-NEXT: Value: 0x401000
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: None
Modified: lld/trunk/test/ELF/tls-i686.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/tls-i686.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/tls-i686.s (original)
+++ lld/trunk/test/ELF/tls-i686.s Fri Sep 21 09:58:13 2018
@@ -32,16 +32,16 @@ _start:
// DIS: Disassembly of section test:
// DIS-NEXT: _start:
-// DIS-NEXT: 11000: ba 08 00 00 00 movl $8, %edx
-// DIS-NEXT: 11005: 65 8b 0d 00 00 00 00 movl %gs:0, %ecx
-// DIS-NEXT: 1100c: 29 d0 subl %edx, %eax
-// DIS-NEXT: 1100e: ba 04 00 00 00 movl $4, %edx
-// DIS-NEXT: 11013: 65 8b 0d 00 00 00 00 movl %gs:0, %ecx
-// DIS-NEXT: 1101a: 29 d0 subl %edx, %eax
-// DIS-NEXT: 1101c: 65 8b 0d 00 00 00 00 movl %gs:0, %ecx
-// DIS-NEXT: 11023: 8d 81 f8 ff ff ff leal -8(%ecx), %eax
-// DIS-NEXT: 11029: 65 8b 0d 00 00 00 00 movl %gs:0, %ecx
-// DIS-NEXT: 11030: 8d 81 77 00 00 00 leal 119(%ecx), %eax
+// DIS-NEXT: 401000: ba 08 00 00 00 movl $8, %edx
+// DIS-NEXT: 401005: 65 8b 0d 00 00 00 00 movl %gs:0, %ecx
+// DIS-NEXT: 40100c: 29 d0 subl %edx, %eax
+// DIS-NEXT: 40100e: ba 04 00 00 00 movl $4, %edx
+// DIS-NEXT: 401013: 65 8b 0d 00 00 00 00 movl %gs:0, %ecx
+// DIS-NEXT: 40101a: 29 d0 subl %edx, %eax
+// DIS-NEXT: 40101c: 65 8b 0d 00 00 00 00 movl %gs:0, %ecx
+// DIS-NEXT: 401023: 8d 81 f8 ff ff ff leal -8(%ecx), %eax
+// DIS-NEXT: 401029: 65 8b 0d 00 00 00 00 movl %gs:0, %ecx
+// DIS-NEXT: 401030: 8d 81 77 00 00 00 leal 119(%ecx), %eax
// RELOC: Relocations [
// RELOC-NEXT: ]
Modified: lld/trunk/test/ELF/tls-opt-gdiele-i686.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/tls-opt-gdiele-i686.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/tls-opt-gdiele-i686.s (original)
+++ lld/trunk/test/ELF/tls-opt-gdiele-i686.s Fri Sep 21 09:58:13 2018
@@ -8,21 +8,21 @@
// NORELOC: Relocations [
// NORELOC-NEXT: Section ({{.*}}) .rel.dyn {
-// NORELOC-NEXT: 0x12058 R_386_TLS_TPOFF tlsshared0 0x0
-// NORELOC-NEXT: 0x1205C R_386_TLS_TPOFF tlsshared1 0x0
+// NORELOC-NEXT: 0x402058 R_386_TLS_TPOFF tlsshared0 0x0
+// NORELOC-NEXT: 0x40205C R_386_TLS_TPOFF tlsshared1 0x0
// NORELOC-NEXT: }
// NORELOC-NEXT: ]
// DISASM: Disassembly of section .text:
// DISASM-NEXT: _start:
-// DISASM-NEXT: 11000: 65 a1 00 00 00 00 movl %gs:0, %eax
-// DISASM-NEXT: 11006: 03 83 f8 ff ff ff addl -8(%ebx), %eax
-// DISASM-NEXT: 1100c: 65 a1 00 00 00 00 movl %gs:0, %eax
-// DISASM-NEXT: 11012: 03 83 fc ff ff ff addl -4(%ebx), %eax
-// DISASM-NEXT: 11018: 65 a1 00 00 00 00 movl %gs:0, %eax
-// DISASM-NEXT: 1101e: 81 e8 08 00 00 00 subl $8, %eax
-// DISASM-NEXT: 11024: 65 a1 00 00 00 00 movl %gs:0, %eax
-// DISASM-NEXT: 1102a: 81 e8 04 00 00 00 subl $4, %eax
+// DISASM-NEXT: 401000: 65 a1 00 00 00 00 movl %gs:0, %eax
+// DISASM-NEXT: 401006: 03 83 f8 ff ff ff addl -8(%ebx), %eax
+// DISASM-NEXT: 40100c: 65 a1 00 00 00 00 movl %gs:0, %eax
+// DISASM-NEXT: 401012: 03 83 fc ff ff ff addl -4(%ebx), %eax
+// DISASM-NEXT: 401018: 65 a1 00 00 00 00 movl %gs:0, %eax
+// DISASM-NEXT: 40101e: 81 e8 08 00 00 00 subl $8, %eax
+// DISASM-NEXT: 401024: 65 a1 00 00 00 00 movl %gs:0, %eax
+// DISASM-NEXT: 40102a: 81 e8 04 00 00 00 subl $4, %eax
.type tlsexe1, at object
.section .tbss,"awT", at nobits
Modified: lld/trunk/test/ELF/tls-opt-i686.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/tls-opt-i686.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/tls-opt-i686.s (original)
+++ lld/trunk/test/ELF/tls-opt-i686.s Fri Sep 21 09:58:13 2018
@@ -10,25 +10,25 @@
// DISASM: Disassembly of section .text:
// DISASM-NEXT: _start:
// LD -> LE:
-// DISASM-NEXT: 11000: 65 a1 00 00 00 00 movl %gs:0, %eax
-// DISASM-NEXT: 11006: 90 nop
-// DISASM-NEXT: 11007: 8d 74 26 00 leal (%esi,%eiz), %esi
-// DISASM-NEXT: 1100b: 8d 90 f8 ff ff ff leal -8(%eax), %edx
-// DISASM-NEXT: 11011: 65 a1 00 00 00 00 movl %gs:0, %eax
-// DISASM-NEXT: 11017: 90 nop
-// DISASM-NEXT: 11018: 8d 74 26 00 leal (%esi,%eiz), %esi
-// DISASM-NEXT: 1101c: 8d 90 fc ff ff ff leal -4(%eax), %edx
+// DISASM-NEXT: 401000: 65 a1 00 00 00 00 movl %gs:0, %eax
+// DISASM-NEXT: 401006: 90 nop
+// DISASM-NEXT: 401007: 8d 74 26 00 leal (%esi,%eiz), %esi
+// DISASM-NEXT: 40100b: 8d 90 f8 ff ff ff leal -8(%eax), %edx
+// DISASM-NEXT: 401011: 65 a1 00 00 00 00 movl %gs:0, %eax
+// DISASM-NEXT: 401017: 90 nop
+// DISASM-NEXT: 401018: 8d 74 26 00 leal (%esi,%eiz), %esi
+// DISASM-NEXT: 40101c: 8d 90 fc ff ff ff leal -4(%eax), %edx
// IE -> LE:
// 4294967288 == 0xFFFFFFF8
// 4294967292 == 0xFFFFFFFC
-// DISASM-NEXT: 11022: 65 a1 00 00 00 00 movl %gs:0, %eax
-// DISASM-NEXT: 11028: c7 c0 f8 ff ff ff movl $4294967288, %eax
-// DISASM-NEXT: 1102e: 65 a1 00 00 00 00 movl %gs:0, %eax
-// DISASM-NEXT: 11034: c7 c0 fc ff ff ff movl $4294967292, %eax
-// DISASM-NEXT: 1103a: 65 a1 00 00 00 00 movl %gs:0, %eax
-// DISASM-NEXT: 11040: 8d 80 f8 ff ff ff leal -8(%eax), %eax
-// DISASM-NEXT: 11046: 65 a1 00 00 00 00 movl %gs:0, %eax
-// DISASM-NEXT: 1104c: 8d 80 fc ff ff ff leal -4(%eax), %eax
+// DISASM-NEXT: 401022: 65 a1 00 00 00 00 movl %gs:0, %eax
+// DISASM-NEXT: 401028: c7 c0 f8 ff ff ff movl $4294967288, %eax
+// DISASM-NEXT: 40102e: 65 a1 00 00 00 00 movl %gs:0, %eax
+// DISASM-NEXT: 401034: c7 c0 fc ff ff ff movl $4294967292, %eax
+// DISASM-NEXT: 40103a: 65 a1 00 00 00 00 movl %gs:0, %eax
+// DISASM-NEXT: 401040: 8d 80 f8 ff ff ff leal -8(%eax), %eax
+// DISASM-NEXT: 401046: 65 a1 00 00 00 00 movl %gs:0, %eax
+// DISASM-NEXT: 40104c: 8d 80 fc ff ff ff leal -4(%eax), %eax
.type tls0, at object
.section .tbss,"awT", at nobits
.globl tls0
Modified: lld/trunk/test/ELF/tls-opt-iele-i686-nopic.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/tls-opt-iele-i686-nopic.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/tls-opt-iele-i686-nopic.s (original)
+++ lld/trunk/test/ELF/tls-opt-iele-i686-nopic.s Fri Sep 21 09:58:13 2018
@@ -14,7 +14,7 @@
// GOTREL-NEXT: SHF_ALLOC
// GOTREL-NEXT: SHF_WRITE
// GOTREL-NEXT: ]
-// GOTREL-NEXT: Address: 0x12058
+// GOTREL-NEXT: Address: 0x402058
// GOTREL-NEXT: Offset: 0x2058
// GOTREL-NEXT: Size: 8
// GOTREL-NEXT: Link: 0
@@ -24,8 +24,8 @@
// GOTREL-NEXT: }
// GOTREL: Relocations [
// GOTREL-NEXT: Section ({{.*}}) .rel.dyn {
-// GOTREL-NEXT: 0x12058 R_386_TLS_TPOFF tlsshared0 0x0
-// GOTREL-NEXT: 0x1205C R_386_TLS_TPOFF tlsshared1 0x0
+// GOTREL-NEXT: 0x402058 R_386_TLS_TPOFF tlsshared0 0x0
+// GOTREL-NEXT: 0x40205C R_386_TLS_TPOFF tlsshared1 0x0
// GOTREL-NEXT: }
// GOTREL-NEXT: ]
@@ -33,24 +33,24 @@
// DISASM-NEXT: _start:
// 4294967288 = 0xFFFFFFF8
// 4294967292 = 0xFFFFFFFC
-// 73808 = (.got)[0] = 0x12058
-// 73812 = (.got)[1] = 0x1205C
-// DISASM-NEXT: 11000: c7 c1 f8 ff ff ff movl $4294967288, %ecx
-// DISASM-NEXT: 11006: 65 8b 01 movl %gs:(%ecx), %eax
-// DISASM-NEXT: 11009: b8 f8 ff ff ff movl $4294967288, %eax
-// DISASM-NEXT: 1100e: 65 8b 00 movl %gs:(%eax), %eax
-// DISASM-NEXT: 11011: 81 c1 f8 ff ff ff addl $4294967288, %ecx
-// DISASM-NEXT: 11017: 65 8b 01 movl %gs:(%ecx), %eax
-// DISASM-NEXT: 1101a: c7 c1 fc ff ff ff movl $4294967292, %ecx
-// DISASM-NEXT: 11020: 65 8b 01 movl %gs:(%ecx), %eax
-// DISASM-NEXT: 11023: b8 fc ff ff ff movl $4294967292, %eax
-// DISASM-NEXT: 11028: 65 8b 00 movl %gs:(%eax), %eax
-// DISASM-NEXT: 1102b: 81 c1 fc ff ff ff addl $4294967292, %ecx
-// DISASM-NEXT: 11031: 65 8b 01 movl %gs:(%ecx), %eax
-// DISASM-NEXT: 11034: 8b 0d 58 20 01 00 movl 73816, %ecx
-// DISASM-NEXT: 1103a: 65 8b 01 movl %gs:(%ecx), %eax
-// DISASM-NEXT: 1103d: 03 0d 5c 20 01 00 addl 73820, %ecx
-// DISASM-NEXT: 11043: 65 8b 01 movl %gs:(%ecx), %eax
+// 4202584 = (.got)[0] = 0x402058
+// 4202588 = (.got)[1] = 0x40205C
+// DISASM-NEXT: 401000: c7 c1 f8 ff ff ff movl $4294967288, %ecx
+// DISASM-NEXT: 401006: 65 8b 01 movl %gs:(%ecx), %eax
+// DISASM-NEXT: 401009: b8 f8 ff ff ff movl $4294967288, %eax
+// DISASM-NEXT: 40100e: 65 8b 00 movl %gs:(%eax), %eax
+// DISASM-NEXT: 401011: 81 c1 f8 ff ff ff addl $4294967288, %ecx
+// DISASM-NEXT: 401017: 65 8b 01 movl %gs:(%ecx), %eax
+// DISASM-NEXT: 40101a: c7 c1 fc ff ff ff movl $4294967292, %ecx
+// DISASM-NEXT: 401020: 65 8b 01 movl %gs:(%ecx), %eax
+// DISASM-NEXT: 401023: b8 fc ff ff ff movl $4294967292, %eax
+// DISASM-NEXT: 401028: 65 8b 00 movl %gs:(%eax), %eax
+// DISASM-NEXT: 40102b: 81 c1 fc ff ff ff addl $4294967292, %ecx
+// DISASM-NEXT: 401031: 65 8b 01 movl %gs:(%ecx), %eax
+// DISASM-NEXT: 401034: 8b 0d 58 20 40 00 movl 4202584, %ecx
+// DISASM-NEXT: 40103a: 65 8b 01 movl %gs:(%ecx), %eax
+// DISASM-NEXT: 40103d: 03 0d 5c 20 40 00 addl 4202588, %ecx
+// DISASM-NEXT: 401043: 65 8b 01 movl %gs:(%ecx), %eax
.type tlslocal0, at object
.section .tbss,"awT", at nobits
Modified: lld/trunk/test/ELF/undef-with-plt-addr-i686.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/undef-with-plt-addr-i686.s?rev=342746&r1=342745&r2=342746&view=diff
==============================================================================
--- lld/trunk/test/ELF/undef-with-plt-addr-i686.s (original)
+++ lld/trunk/test/ELF/undef-with-plt-addr-i686.s Fri Sep 21 09:58:13 2018
@@ -17,7 +17,7 @@ mov $set_data, %eax
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_EXECINSTR
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x11010
+// CHECK-NEXT: Address: 0x401010
// CHECK: Name: set_data
-// CHECK-NEXT: Value: 0x11020
+// CHECK-NEXT: Value: 0x401020
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