[PATCH] D52304: [X86][BMI1]: X86DAGToDAGISel: select BEXTR from x & ~(-1 << nbits) pattern

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 20 08:01:00 PDT 2018


lebedev.ri added inline comments.


================
Comment at: lib/Target/X86/X86ISelDAGToDAG.cpp:2664-2671
+    if (Mask->getOpcode() != ISD::XOR || !Mask->hasOneUse())
+      return false;
+    ConstantSDNode *XorCst = dyn_cast<ConstantSDNode>(Mask->getOperand(1));
+    if (!XorCst || !XorCst->isAllOnesValue())
+      return false;
+    // Match `-1 << nbits`. Must only have one use!
+    SDValue M0 = Mask->getOperand(0);
----------------
Do we get rid of at least one extra instruction, or of both of them?


Repository:
  rL LLVM

https://reviews.llvm.org/D52304





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