[PATCH] D52293: [X86][BMI] BEXTR: handle (X >> C1) & (C2 << C3) as ((X >> (C1 + C3)) & C2) << C3 (PR38938)

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added inline comments.


================
Comment at: lib/Target/X86/X86ISelDAGToDAG.cpp:2630-2633
   // Make sure we are only using bits that were in the original value, not
   // shifted in.
   if (Shift + MaskSize > NVT.getSizeInBits())
     return false;
----------------
Actually, this does not have any test coverage it seems.
So i'm not sure what extra tests this needs.


Repository:
  rL LLVM

https://reviews.llvm.org/D52293