[PATCH] D38128: Handle COPYs of physregs better (regalloc hints)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

In https://reviews.llvm.org/D38128#1239480, @niravd wrote:

> I've gone through and marked all the places.
>
> > Is this just about the extra 'movdqa' in vector-shift-ashr-128.ll, or are there other diffs to look at?


These are all due to pblendvb/blendvpd/blendvps being hardwired to use the xmm0 as the mask register (limit goes away for avx)


Repository:
  rL LLVM

https://reviews.llvm.org/D38128