[PATCH] D52216: [AArch64] Support adding X[8-15, 18] registers as CSRs.

[Nick Desaulniers via Phabricator via llvm-commits]

nickdesaulniers added inline comments.


================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:4054-4058
+  if (MF.getSubtarget<AArch64Subtarget>().hasCustomCallingConv()) {
+    uint32_t *UpdatedMask = MF.allocateRegMask();
+    TRI->getCustomCallPreservedMask(MF, Mask, UpdatedMask);
+    Mask = UpdatedMask;
+  }
----------------
This pattern is repeated, a lot.

Maybe you could make a single function like:

```
void UpdateMaskCustomCall (const MachineFunction& MF, uint32_t** Mask) {
  ...
}
...
{
   uint32_t* Mask = ...;
   MachineFunction &MF = ...;
   UpdateMaskCustomCall(MF, &Mask);
}
```
?


Repository:
  rL LLVM

https://reviews.llvm.org/D52216