[PATCH] D52216: [AArch64] Support adding X[8-15, 18] registers as CSRs.

[Tri Vo via Phabricator via llvm-commits]

trong created this revision.
trong added reviewers: srhines, nickdesaulniers, efriedma.
Herald added a reviewer: javed.absar.
Herald added subscribers: jfb, kristof.beyls.

Specifying X[8-15,18] registers as callee-saved is used to support
CONFIG_ARM64_LSE_ATOMICS in Linux kernel. As part of this patch we:

- use custom CSR list/mask when user specifies custom CSRs
- update Machine Register Info's list of CSRs with additional custom CSRs in

LowerCall and LowerFormalArguments.


Repository:
  rL LLVM

https://reviews.llvm.org/D52216

Files:
  lib/Target/AArch64/AArch64.td
  lib/Target/AArch64/AArch64CallLowering.cpp
  lib/Target/AArch64/AArch64FastISel.cpp
  lib/Target/AArch64/AArch64FrameLowering.cpp
  lib/Target/AArch64/AArch64ISelLowering.cpp
  lib/Target/AArch64/AArch64RegisterInfo.cpp
  lib/Target/AArch64/AArch64RegisterInfo.h
  lib/Target/AArch64/AArch64Subtarget.cpp
  lib/Target/AArch64/AArch64Subtarget.h
  test/CodeGen/AArch64/arm64-custom-call-saved-reg.ll

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