[llvm] r341657 - [X86][SSE] Add additional fadd/fsub(x, bitcast_fneg(y)) tests with different integer bitwidths

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 7 06:27:07 PDT 2018


Author: rksimon
Date: Fri Sep  7 06:27:07 2018
New Revision: 341657

URL: http://llvm.org/viewvc/llvm-project?rev=341657&view=rev
Log:
[X86][SSE] Add additional fadd/fsub(x, bitcast_fneg(y)) tests with different integer bitwidths

Modified:
    llvm/trunk/test/CodeGen/X86/fp-logic.ll

Modified: llvm/trunk/test/CodeGen/X86/fp-logic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp-logic.ll?rev=341657&r1=341656&r2=341657&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp-logic.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp-logic.ll Fri Sep  7 06:27:07 2018
@@ -331,3 +331,29 @@ define <4 x float> @fsub_bitcast_fneg_ve
   %fsub = fsub <4 x float> %x, %bc2
   ret <4 x float> %fsub
 }
+
+define <4 x float> @fadd_bitcast_fneg_vec_width(<4 x float> %x, <4 x float> %y) {
+; CHECK-LABEL: fadd_bitcast_fneg_vec_width:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorps {{.*}}(%rip), %xmm1
+; CHECK-NEXT:    addps %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %bc1 = bitcast <4 x float> %y to <2 x i64>
+  %xor = xor <2 x i64> %bc1, <i64 -9223372034707292160, i64 -9223372034707292160>
+  %bc2 = bitcast <2 x i64> %xor to <4 x float>
+  %fadd = fadd <4 x float> %x, %bc2
+  ret <4 x float> %fadd
+}
+
+define <4 x float> @fsub_bitcast_fneg_vec_width(<4 x float> %x, <4 x float> %y) {
+; CHECK-LABEL: fsub_bitcast_fneg_vec_width:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorps {{.*}}(%rip), %xmm1
+; CHECK-NEXT:    subps %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %bc1 = bitcast <4 x float> %y to <2 x i64>
+  %xor = xor <2 x i64> %bc1, <i64 -9223372034707292160, i64 -9223372034707292160>
+  %bc2 = bitcast <2 x i64> %xor to <4 x float>
+  %fsub = fsub <4 x float> %x, %bc2
+  ret <4 x float> %fsub
+}




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