[PATCH] D51706: ARM64: improve non-zero memset isel by ~2x

Matthias Braun via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 5 16:06:22 PDT 2018


MatzeB accepted this revision.
MatzeB added a comment.
This revision is now accepted and ready to land.

Nice change, LGTM!
Maybe wait a couple days before committing in case someone better versed with SelectionDAG wants to chime in.



================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:5198-5220
+    LLVM_DEBUG(dbgs() << "Legal " << VT.getEVTString() << " imm value: 0\n");
     return true;
   }
 
-  StringRef FPType;
   bool IsLegal = false;
   SmallString<128> ImmStrVal;
   Imm.toString(ImmStrVal);
----------------
unrelated, so maybe split this into a separate commit when this review is approved (very nice change though)


Repository:
  rL LLVM

https://reviews.llvm.org/D51706





More information about the llvm-commits mailing list