[PATCH] D51478: [AArch64] NFC: Refactoring to prepare for vector PCS.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen marked 2 inline comments as done.
sdesmalen added inline comments.


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Comment at: lib/Target/AArch64/AArch64FrameLowering.cpp:1377
+       LdrOpc = RPI.isPaired() ? AArch64::LDPXi : AArch64::LDRXui;
+       Size = RPI.isPaired() ? 16 : 8;
+       Align = 8;
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thegameg wrote:
> I think the size should always be 8 even if it's paired. The instruction will end up having 2 x MachineMemOperand load of size 8.
You're absolutely right!  I'll fix that in AsmPrinter.cpp in a separate patch.


https://reviews.llvm.org/D51478