[PATCH] D46179: [X86] Lowering addus/subus intrinsics to native IR (LLVM part)

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 24 11:21:01 PDT 2018


spatel added a comment.

In https://reviews.llvm.org/D46179#1212714, @srj wrote:

> In https://reviews.llvm.org/D46179#1212415, @spatel wrote:
>
> > Would it help or hurt if we narrowed the select in IR to match the final return type and original operand types (I made the types smaller from your code just to make this easier to read):
>
>
> Not sure I understand the question -- are you suggesting that this is code I should add, or that this is a transformation that LLVM would do under the hood?
>
> If the former, I don't see how it would help, unless I made the function not-inlined (which would seem to compromise efficiency).
>
> If the latter, I'm not qualified to answer as I know very little about the relevant internal bits of LLVM :-)


Sorry it wasn't clear - I was suggesting the latter. The transforms that are occurring here are in instcombine, but we're missing a narrowing opportunity for the select. It does look like that will allow the backend to match saturation again (at least in my simple tests). Let's continue the discussion in the bug report since this review is closed.


Repository:
  rL LLVM

https://reviews.llvm.org/D46179





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