[PATCH] D50982: [AMDGPU] Legalize VGPR Rsrc operands for MUBUF instructions

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

We should probably have some real executing tests that stress this in piglit or somewhere else.

A solution to the graphics semantics problem might be to use a readfirstlane intrinsic call as an input as an assertion the input is known uniform. We can then optimize out patterns that look like V_READFIRSTLANE (COPY SGPR to VGPR)


https://reviews.llvm.org/D50982