[PATCH] D50682: [WebAssembly] Fix encoding of non-SIMD vector-typed instructions

Heejin Ahn via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 13 18:25:15 PDT 2018

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aheejin added a comment.

Oh, do we have any test for this?


Repository:
  rL LLVM

https://reviews.llvm.org/D50682

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