[PATCH] D50682: [WebAssembly] Fix encoding of non-SIMD vector-typed instructions
Thomas Lively via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 13 17:50:41 PDT 2018
tlively created this revision.
tlively added reviewers: aheejin, dschuff.
Herald added subscribers: llvm-commits, sunfish, jgravelle-google, sbc100.
Previously SIMD_I was the same as a normal instruction except for the
addition of a HasSIM128 predicate. However, https://reviews.llvm.org/rL339186 changed the
encoding of SIMD_I instructions to automatically contain the SIMD
prefix byte. This broke the encoding of non-SIMD vector-typed
instructions, which had instantiated SIMD_I. This CL corrects this
error.
Repository:
rL LLVM
https://reviews.llvm.org/D50682
Files:
lib/Target/WebAssembly/WebAssemblyInstrCall.td
lib/Target/WebAssembly/WebAssemblyInstrControl.td
Index: lib/Target/WebAssembly/WebAssemblyInstrControl.td
===================================================================
--- lib/Target/WebAssembly/WebAssemblyInstrControl.td
+++ lib/Target/WebAssembly/WebAssemblyInstrControl.td
@@ -103,14 +103,16 @@
}
multiclass SIMD_RETURN<ValueType vt> {
- defm RETURN_#vt : SIMD_I<(outs), (ins V128:$val), (outs), (ins),
- [(WebAssemblyreturn (vt V128:$val))],
- "return \t$val", "return", 0x0f>;
+ defm RETURN_#vt : I<(outs), (ins V128:$val), (outs), (ins),
+ [(WebAssemblyreturn (vt V128:$val))],
+ "return \t$val", "return", 0x0f>,
+ Requires<[HasSIMD128]>;
// Equivalent to RETURN_#vt, for use at the end of a function when wasm
// semantics return by falling off the end of the block.
let isCodeGenOnly = 1 in
- defm FALLTHROUGH_RETURN_#vt : SIMD_I<(outs), (ins V128:$val), (outs), (ins),
- []>;
+ defm FALLTHROUGH_RETURN_#vt : I<(outs), (ins V128:$val), (outs), (ins),
+ []>,
+ Requires<[HasSIMD128]>;
}
let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
Index: lib/Target/WebAssembly/WebAssemblyInstrCall.td
===================================================================
--- lib/Target/WebAssembly/WebAssemblyInstrCall.td
+++ lib/Target/WebAssembly/WebAssemblyInstrCall.td
@@ -52,34 +52,35 @@
}
multiclass SIMD_CALL<ValueType vt, string prefix> {
- defm CALL_#vt : SIMD_I<(outs V128:$dst), (ins function32_op:$callee,
- variable_ops),
- (outs), (ins function32_op:$callee),
- [(set (vt V128:$dst),
- (WebAssemblycall1 (i32 imm:$callee)))],
- !strconcat(prefix, "call\t$dst, $callee"),
- !strconcat(prefix, "call\t$callee"),
- 0x10>;
+
+ defm CALL_#vt : I<(outs V128:$dst), (ins function32_op:$callee, variable_ops),
+ (outs), (ins function32_op:$callee),
+ [(set (vt V128:$dst),
+ (WebAssemblycall1 (i32 imm:$callee)))],
+ !strconcat(prefix, "call\t$dst, $callee"),
+ !strconcat(prefix, "call\t$callee"),
+ 0x10>,
+ Requires<[HasSIMD128]>;
let isCodeGenOnly = 1 in {
- defm PCALL_INDIRECT_#vt : SIMD_I<(outs V128:$dst),
- (ins I32:$callee, variable_ops),
- (outs), (ins I32:$callee),
- [(set (vt V128:$dst),
- (WebAssemblycall1 I32:$callee))],
- "PSEUDO CALL INDIRECT\t$callee",
- "PSEUDO CALL INDIRECT\t$callee">;
+ defm PCALL_INDIRECT_#vt : I<(outs V128:$dst),
+ (ins I32:$callee, variable_ops),
+ (outs), (ins I32:$callee),
+ [(set (vt V128:$dst),
+ (WebAssemblycall1 I32:$callee))],
+ "PSEUDO CALL INDIRECT\t$callee",
+ "PSEUDO CALL INDIRECT\t$callee">,
+ Requires<[HasSIMD128]>;
} // isCodeGenOnly = 1
- defm CALL_INDIRECT_#vt : SIMD_I<(outs V128:$dst),
- (ins TypeIndex:$type, i32imm:$flags,
- variable_ops),
- (outs), (ins TypeIndex:$type, i32imm:$flags),
- [],
- !strconcat(prefix,
- "call_indirect\t$dst"),
- !strconcat(prefix, "call_indirect\t$type"),
- 0x11>;
+ defm CALL_INDIRECT_#vt : I<(outs V128:$dst),
+ (ins TypeIndex:$type, i32imm:$flags, variable_ops),
+ (outs), (ins TypeIndex:$type, i32imm:$flags),
+ [],
+ !strconcat(prefix, "call_indirect\t$dst"),
+ !strconcat(prefix, "call_indirect\t$type"),
+ 0x11>,
+ Requires<[HasSIMD128]>;
}
let Uses = [SP32, SP64], isCall = 1 in {
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