[PATCH] D50636: [DAGCombiner] Add X / X -> 1 & X % X -> 0 folds.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: test/CodeGen/SystemZ/pr32372.ll:18
   store i16 -3825, i16* undef
-  %L5 = load i8, i8* %0
+  %L5 = load volatile i8, i8* %0
   %B9 = urem i8 %L5, %L
----------------
Tried again against bleeding edge trunk and I still see this change and without the volatile (which prevents the loads being combined) the checks reduce to:
```
define void @pr32372(i8*) {
; CHECK-LABEL: pr32372:
; CHECK:       # %bb.0: # %BB
; CHECK-NEXT:    mvhhi 0(%r1), -3825
; CHECK-NEXT:  .LBB0_1: # %CF251
; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
; CHECK-NEXT:    j .LBB0_1
```


Repository:
  rL LLVM

https://reviews.llvm.org/D50636