[PATCH] D50518: [ARM] Disallow zexts in ARMCodeGenPrepare

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added inline comments.


================
Comment at: lib/Target/ARM/ARMCodeGenPrepare.cpp:146
 
-  return IntTy->getBitWidth() <= 16;
+/// Return true if the given value is a leaf that will need to be zext'd.
+static bool isSource(Value *V) {
----------------
This is a nit, but I would appreciate if you can elaborate a little on the definition of "sources" and "sinks". Thus, more in general,  elaborate a bit on the  terminology, and also the rationale behind it. I mean, for example, I appreciate I can read in the implementation that an argument, load, call, can be a source. But could there be more, and if so, why are you only interested in these? Perhaps a bit of an algorithmic description is nice too and  how these sources and sinks fit in to the bigger picture? I appreciate most information is there already, but could be made a bit more explicit, which is why this is a nit.


https://reviews.llvm.org/D50518