[PATCH] D50518: [ARM] Disallow zexts in ARMCodeGenPrepare
Sam Parker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 10 03:12:33 PDT 2018
samparker added inline comments.
================
Comment at: lib/Target/ARM/ARMCodeGenPrepare.cpp:517-518
bool ARMCodeGenPrepare::isLegalToPromote(Value *V) {
- if (!isSupportedType(V))
- return false;
-
- unsigned VSize = 0;
- if (auto *Ld = dyn_cast<LoadInst>(V)) {
- auto *PtrTy = cast<PointerType>(Ld->getPointerOperandType());
- VSize = PtrTy->getElementType()->getPrimitiveSizeInBits();
- } else if (auto *ZExt = dyn_cast<ZExtInst>(V)) {
- VSize = ZExt->getOperand(0)->getType()->getPrimitiveSizeInBits();
- } else {
- VSize = V->getType()->getPrimitiveSizeInBits();
- }
-
- if (VSize > TypeSize)
- return false;
+ //if (!isSupportedType(V))
+ //return false;
----------------
rnk wrote:
> Commented out code not intended for commit?
ah yep.
================
Comment at: test/CodeGen/ARM/arm-cgp-zext-truncs.ll:267-270
+ switch i9 %trunc, label %cleanup.fold.split [
+ i9 0, label %cleanup
+ i9 -256, label %if.then7
+ ]
----------------
rnk wrote:
> I take it this is a reduction of the test case I sent?
yes, its the exact IR just with the function renamed to something half readable.
https://reviews.llvm.org/D50518
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