[PATCH] D50212: [X86] Remove RELEASE_ and ACQUIRE_ pseudo instructions. Use isel patterns and the normal instructions instead

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: efriedma, spatel, RKSimon, hfinkel.
Herald added a subscriber: jfb.

At one point in time acquire implied mayLoad and mayStore as did release. Thus we needed separate pseudos that also carried that property. This appears to no longer be the case. I believe it was changed in 2012 with a comment saying that atomic memory accesses are marked volatile which preserves the ordering.

So from what I can tell we shouldn't need additional pseudos since they aren't carry any flags that are different from the normal instructions. The only thing I can think of is that we may consider them for load folding candidates in the peephole pass now where we didn't before. If that's important hopefully there's something in the memory operand we can check to prevent the folding without relying on pseudo instructions.

I've also remove the code that implemented atomic_load+fadd+atomic_store. We didn't support any other fp ops. It didn't support AVX encoding. And it used a CustomInserter. I think it can be done with isel patterns instead, but I'm not sure how important it really is. It doesn't look like icc, gcc, or MSVC try this hard to fold any operations with atomic load/store so its not clear we should.


https://reviews.llvm.org/D50212

Files:
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86InstrCompiler.td
  lib/Target/X86/X86MCInstLower.cpp
  test/CodeGen/X86/atomic-non-integer.ll
  test/CodeGen/X86/atomic_idempotent.ll
  test/CodeGen/X86/atomic_mi.ll
  test/CodeGen/X86/conditional-tailcall-samedest.mir

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