[PATCH] D49861: [X86] Improved sched models for X86 XCHG*rr and XADD*rr instructions

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: lib/Target/X86/X86Schedule.td:123
 defm WriteBSWAP64: X86SchedWritePair; // Byte Order (Endiannes) Swap
+def  WriteXCHG   : SchedWrite;
 
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lebedev.ri wrote:
> `// Exchange the contents of two operands`
> ?
Add
```
// Compare+Exchange - TODO RMW support.
```


https://reviews.llvm.org/D49861