[llvm] r338354 - [ARM] Revert r337821

Reid Kleckner via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 31 17:25:16 PDT 2018 

The reduced test case is:

typedef char a;
enum b {};
enum c : a;
enum d { e, f, g, h, i };
template <class j, int k, int l> class m {
public:
  static const int n = (1 << k << l) - 1;
  static const int o = k + l;
  static j p(int aa) { return j((aa & n) >> k); }
};
class q {
public:
  b s() { return m<b, 0, 3>::p(r); }
  bool ab() {
    d a = m<d, m<c, m<b, 0, 3>::o, 3>::o, 3>::p(r);
    return a == e;
  }
  bool u() {
    d t = m<d, m<c, m<b, 0, 3>::o, 3>::o, 3>::p(r);
    return t == i;
  }
  short r;
};
class v;
class x {
public:
  v *ac();
};
class v {
public:
  q *ad() { return &w; }
  q w;
};
class ae {
  x *af() const;
  enum y { z, ag, ah };
  y ai() const;
};
ae::y ae::ai() const {
  v b = *af()->ac();
  if (b.ad()->ab())
    return z;
  if (b.ad()->u())
    return b.ad()->s() ? ag : ah;
  return ah;
}

When I compile like so it crashes when this patch is applied:

$ ./bin/clang -c ast.cpp --target=thumbv7--linux-android -std=c++14 -O2
Duplicate integer as switch case
  switch i32 %trunc, label %cleanup.fold.split [
    i32 0, label %cleanup
    i32 0, label %if.then7
  ]
i32 0
fatal error: error in backend: Broken function found, compilation aborted!
clang-7: error: clang frontend command failed with exit code 70 (use
-v to see invocation)


On Tue, Jul 31, 2018 at 4:10 PM Reid Kleckner <rnk at google.com> wrote:

> I reverted this in r338452. It seems ARMCodeGenPrepare is not ready for
> prime time. It introduces verifier failures that look like:
>       Duplicate integer as switch case
>       switch i32 %trunc, label %if.end13 [
>         i32 0, label %cleanup36
>         i32 0, label %if.then8
>       ], !dbg !4981
>       i32 0
>       fatal error: error in backend: Broken function found, compilation
> aborted!
>
> I'll keep reducing and send along what I get.
>
> On Tue, Jul 31, 2018 at 2:04 AM Sam Parker via llvm-commits <
> llvm-commits at lists.llvm.org> wrote:
>
>> Author: sam_parker
>> Date: Tue Jul 31 02:04:14 2018
>> New Revision: 338354
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=338354&view=rev
>> Log:
>> [ARM] Revert r337821
>>
>> Re-enabling ARMCodeGenPrepare by default after failing to reproduce
>> the bootstrap issues that I was concerned it was causing.
>>
>>
>> Modified:
>>     llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp
>>     llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll
>>     llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll
>>     llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll
>>
>> Modified: llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp?rev=338354&r1=338353&r2=338354&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp (original)
>> +++ llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp Tue Jul 31 02:04:14
>> 2018
>> @@ -42,7 +42,7 @@
>>  using namespace llvm;
>>
>>  static cl::opt<bool>
>> -DisableCGP("arm-disable-cgp", cl::Hidden, cl::init(true),
>> +DisableCGP("arm-disable-cgp", cl::Hidden, cl::init(false),
>>             cl::desc("Disable ARM specific CodeGenPrepare pass"));
>>
>>  static cl::opt<bool>
>>
>> Modified: llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll?rev=338354&r1=338353&r2=338354&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll (original)
>> +++ llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll Tue Jul 31 02:04:14 2018
>> @@ -1,6 +1,6 @@
>> -; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s
>> -arm-disable-cgp=false -o - | FileCheck %s --check-prefix=CHECK-COMMON
>> --check-prefix=CHECK-NODSP
>> -; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false
>> -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK-COMMON
>> --check-prefix=CHECK-DSP
>> -; RUN: llc -mtriple=thumbv8 %s -arm-disable-cgp=false
>> -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - |
>> FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
>> +; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -o - | FileCheck %s
>> --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
>> +; RUN: llc -mtriple=thumbv7em %s -arm-enable-scalar-dsp=true -o - |
>> FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
>> +; RUN: llc -mtriple=thumbv8 %s -arm-enable-scalar-dsp=true
>> -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s
>> --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
>>
>>  ; CHECK-COMMON-LABEL: test_ult_254_inc_imm:
>>  ; CHECK-DSP:        adds    r0, #1
>>
>> Modified: llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll?rev=338354&r1=338353&r2=338354&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll (original)
>> +++ llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll Tue Jul 31
>> 02:04:14 2018
>> @@ -1,7 +1,7 @@
>> -; RUN: llc -mtriple=thumbv7m -arm-disable-cgp=false %s -o - | FileCheck
>> %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
>> -; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false %s -o - |
>> FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
>> -; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false
>> -arm-enable-scalar-dsp=true -mcpu=cortex-m33 %s -o - | FileCheck %s
>> --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
>> -; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false
>> -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - |
>> FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
>> +; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s
>> --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
>> +; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s
>> --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
>> +; RUN: llc -mtriple=thumbv8m.main -arm-enable-scalar-dsp=true
>> -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON
>> --check-prefix=CHECK-DSP
>> +; RUN: llc -mtriple=thumbv7em %s -arm-enable-scalar-dsp=true
>> -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s
>> --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
>>
>>  ; Test that ARMCodeGenPrepare can handle:
>>  ; - loops
>>
>> Modified: llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll?rev=338354&r1=338353&r2=338354&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll (original)
>> +++ llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll Tue Jul 31 02:04:14 2018
>> @@ -1,7 +1,7 @@
>> -; RUN: llc -mtriple=thumbv7m -arm-disable-cgp=false %s -o - | FileCheck
>> %s
>> -; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false %s -o - |
>> FileCheck %s
>> -; RUN: llc -mtriple=thumbv7 %s -arm-disable-cgp=false -o - | FileCheck %s
>> -; RUN: llc -mtriple=armv8 %s -arm-disable-cgp=false -o - | FileCheck %s
>> +; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s
>> +; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s
>> +; RUN: llc -mtriple=thumbv7 %s -o - | FileCheck %s
>> +; RUN: llc -mtriple=armv8 %s -o - | FileCheck %s
>>
>>  ; Test to check that ARMCodeGenPrepare doesn't optimised away sign
>> extends.
>>  ; CHECK-LABEL: test_signed_load:
>>
>>
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>
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