[llvm] r338354 - [ARM] Revert r337821

Reid Kleckner via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 31 16:10:44 PDT 2018 

I reverted this in r338452. It seems ARMCodeGenPrepare is not ready for
prime time. It introduces verifier failures that look like:
      Duplicate integer as switch case
      switch i32 %trunc, label %if.end13 [
        i32 0, label %cleanup36
        i32 0, label %if.then8
      ], !dbg !4981
      i32 0
      fatal error: error in backend: Broken function found, compilation
aborted!

I'll keep reducing and send along what I get.

On Tue, Jul 31, 2018 at 2:04 AM Sam Parker via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Author: sam_parker
> Date: Tue Jul 31 02:04:14 2018
> New Revision: 338354
>
> URL: http://llvm.org/viewvc/llvm-project?rev=338354&view=rev
> Log:
> [ARM] Revert r337821
>
> Re-enabling ARMCodeGenPrepare by default after failing to reproduce
> the bootstrap issues that I was concerned it was causing.
>
>
> Modified:
>     llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp
>     llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll
>     llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll
>     llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll
>
> Modified: llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp?rev=338354&r1=338353&r2=338354&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMCodeGenPrepare.cpp Tue Jul 31 02:04:14
> 2018
> @@ -42,7 +42,7 @@
>  using namespace llvm;
>
>  static cl::opt<bool>
> -DisableCGP("arm-disable-cgp", cl::Hidden, cl::init(true),
> +DisableCGP("arm-disable-cgp", cl::Hidden, cl::init(false),
>             cl::desc("Disable ARM specific CodeGenPrepare pass"));
>
>  static cl::opt<bool>
>
> Modified: llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll?rev=338354&r1=338353&r2=338354&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll (original)
> +++ llvm/trunk/test/CodeGen/ARM/arm-cgp-icmps.ll Tue Jul 31 02:04:14 2018
> @@ -1,6 +1,6 @@
> -; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s
> -arm-disable-cgp=false -o - | FileCheck %s --check-prefix=CHECK-COMMON
> --check-prefix=CHECK-NODSP
> -; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false
> -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK-COMMON
> --check-prefix=CHECK-DSP
> -; RUN: llc -mtriple=thumbv8 %s -arm-disable-cgp=false
> -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - |
> FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
> +; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -o - | FileCheck %s
> --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
> +; RUN: llc -mtriple=thumbv7em %s -arm-enable-scalar-dsp=true -o - |
> FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
> +; RUN: llc -mtriple=thumbv8 %s -arm-enable-scalar-dsp=true
> -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s
> --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
>
>  ; CHECK-COMMON-LABEL: test_ult_254_inc_imm:
>  ; CHECK-DSP:        adds    r0, #1
>
> Modified: llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll?rev=338354&r1=338353&r2=338354&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll (original)
> +++ llvm/trunk/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll Tue Jul 31
> 02:04:14 2018
> @@ -1,7 +1,7 @@
> -; RUN: llc -mtriple=thumbv7m -arm-disable-cgp=false %s -o - | FileCheck
> %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
> -; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false %s -o - |
> FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
> -; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false
> -arm-enable-scalar-dsp=true -mcpu=cortex-m33 %s -o - | FileCheck %s
> --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
> -; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false
> -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - |
> FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
> +; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s
> --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
> +; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s
> --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
> +; RUN: llc -mtriple=thumbv8m.main -arm-enable-scalar-dsp=true
> -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON
> --check-prefix=CHECK-DSP
> +; RUN: llc -mtriple=thumbv7em %s -arm-enable-scalar-dsp=true
> -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s
> --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
>
>  ; Test that ARMCodeGenPrepare can handle:
>  ; - loops
>
> Modified: llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll?rev=338354&r1=338353&r2=338354&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll (original)
> +++ llvm/trunk/test/CodeGen/ARM/arm-cgp-signed.ll Tue Jul 31 02:04:14 2018
> @@ -1,7 +1,7 @@
> -; RUN: llc -mtriple=thumbv7m -arm-disable-cgp=false %s -o - | FileCheck %s
> -; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false %s -o - |
> FileCheck %s
> -; RUN: llc -mtriple=thumbv7 %s -arm-disable-cgp=false -o - | FileCheck %s
> -; RUN: llc -mtriple=armv8 %s -arm-disable-cgp=false -o - | FileCheck %s
> +; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s
> +; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s
> +; RUN: llc -mtriple=thumbv7 %s -o - | FileCheck %s
> +; RUN: llc -mtriple=armv8 %s -o - | FileCheck %s
>
>  ; Test to check that ARMCodeGenPrepare doesn't optimised away sign
> extends.
>  ; CHECK-LABEL: test_signed_load:
>
>
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