[PATCH] D50020: [X86] Preserve more liveness information in emitStackProbeInline
Francis Visoiu Mistrih via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 30 15:32:48 PDT 2018
thegameg created this revision.
thegameg added reviewers: MatzeB, rnk, craig.topper.
This commit fixes two issues with the liveness information after the call:
1. The code always spills RCX and RDX if InProlog == true, which results in a use of undefined phys reg.
2. FinalReg, JoinReg, RoundedReg, SizeReg are not added as live-ins to the basic blocks that use them, therefore they are seen undefined.
PR38376
https://reviews.llvm.org/D50020
Files:
lib/Target/X86/X86FrameLowering.cpp
test/CodeGen/X86/win_coreclr_chkstk.ll
test/CodeGen/X86/win_coreclr_chkstk_liveins.mir
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