[PATCH] D49836: AMDGPU: Remove broken ternary i16 patterns
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 26 01:46:44 PDT 2018
arsenm added inline comments.
================
Comment at: lib/Target/AMDGPU/VOP3Instructions.td:469-474
-def : GCNPat<
- (i64 (op3 (op2 (op1 i16:$src0, i16:$src1), i16:$src2))),
- (REG_SEQUENCE VReg_64,
- (inst i16:$src0, i16:$src1, i16:$src2, (i1 0)), sub0,
- (V_MOV_B32_e32 (i32 0)), sub1)
->;
----------------
These can be fixed, they don't need to be dropped.
It's also more complicated because since gfx9 there is a control bit for whether the high 16-bits are zeroed or preserved which we haven't implemented
Repository:
rL LLVM
https://reviews.llvm.org/D49836
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