[PATCH] D49663: [x86/SLH] Teach the x86 speculative load hardening pass to harden against v1.2 BCBS attacks directly.

[Chandler Carruth via Phabricator via llvm-commits]

chandlerc marked 2 inline comments as done.
chandlerc added a comment.

All done and submitting! Thanks!



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Comment at: llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp:2187
+
+  // For all of these, the target register is zero.
+  auto &TargetOp = MI.getOperand(0);
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echristo wrote:
> Nit: I know you don't mean it, but it sounds like you're talking about r0 on some architecture :)
Doh, yeah. Simpler to just say 'the first operand of the instruction'. Thanks.


Repository:
  rL LLVM

https://reviews.llvm.org/D49663