[PATCH] D49310: [llvm-mca][BtVer2] Teach how to identify dependency-breaking idioms.
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 20 07:45:39 PDT 2018
lebedev.ri added inline comments.
================
Comment at: tools/llvm-mca/DispatchStage.cpp:110
// An example of dependency-breaking instruction on X86 is a zero-idiom XOR.
- if (!Desc.isZeroLatency())
- for (std::unique_ptr<ReadState> &RS : IS.getUses())
----------------
andreadb wrote:
> lebedev.ri wrote:
> > So it will no longer even consider the sched profile?
> Not sure I understand the question. I am definitely using profile information from the scheduling model.
What i'm asking is - what happens if sched model says that instruction N has zero latency, but `isDependencyBreaking()` does not say that?
https://reviews.llvm.org/D49310
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