[PATCH] D49574: [CodeGen] Fix ICE in SelectionDAG::computeKnownBits

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

I think SelectionDAG::ComputeNumSignBits and TargetLowering::SimplifyDemandedVectorElts suffer from the same issue - can you deal with those as well ?



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Comment at: test/CodeGen/AMDGPU/extract-subvector-equal-length.ll:1
+; RUN: llc -march=amdgcn < %s
+
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FileCheck ?


Repository:
  rL LLVM

https://reviews.llvm.org/D49574