[PATCH] D49436: [X86][BtVer2] correctly model the latency/throughput of LEA instructions.
Andrea Di Biagio via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 19 05:48:56 PDT 2018
andreadb updated this revision to Diff 156249.
andreadb added a comment.
Patch updated.
Addressed review comments.
https://reviews.llvm.org/D49436
Files:
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
lib/Target/X86/X86.td
lib/Target/X86/X86FixupLEAs.cpp
lib/Target/X86/X86SchedPredicates.td
lib/Target/X86/X86Schedule.td
lib/Target/X86/X86ScheduleBtVer2.td
test/CodeGen/X86/lea32-schedule.ll
test/CodeGen/X86/lea64-schedule.ll
test/CodeGen/X86/mul-constant-i32.ll
test/CodeGen/X86/mul-constant-i64.ll
test/CodeGen/X86/schedule-x86-64-shld.ll
test/tools/llvm-mca/X86/BtVer2/resources-lea.s
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