[PATCH] D49436: [X86][BtVer2] correctly model the latency/throughput of LEA instructions.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: utils/TableGen/PredicateExpander.cpp:50
+  OS << "MI" << (isByRef() ? "." : "->") << "getOperand(" << OpIndex
+     << ").getReg() " << (shouldNegate() ? "!= " : "== ") << "0";
+}
----------------
mattd wrote:
> I'm curious about the hardcoded value "0",  is the invalid register always 0 for all targets?
It should be. Every target should get NoRegister as the first entry in its enum.


https://reviews.llvm.org/D49436