[PATCH] D49280: [X86] Remove isel patterns for MOVSS/MOVSD ISD opcodes with integer types.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

In https://reviews.llvm.org/D49280#1162909, @craig.topper wrote:

> Which microarchitecture cares about switching PD/PS? To my knowledge, no Intel architecture cares. Do any of the AMD architectures care?


It tends to be only the 'weird mixture' PS/PD domain shifts that cause a stall: VADDPS then VMULPD, that kind of thing - shuffles and bitops tend to be more forgiving (and more easy to fix.)


Repository:
  rL LLVM

https://reviews.llvm.org/D49280