[PATCH] D48467: [X86] Recognize a splat of negate in isFNEG

[Easwaran Raman via Phabricator via llvm-commits]

eraman marked 3 inline comments as done.
eraman added inline comments.


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Comment at: lib/Target/X86/X86ISelLowering.cpp:36856
   EVT OrigVT = N->getValueType(0);
-  SDValue Arg = isFNEG(N);
+  SDValue Arg = isFNEG(DAG, N);
   assert(Arg.getNode() && "N is expected to be an FNEG node");
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RKSimon wrote:
> Now that we're creating new nodes inside isFNEG() I wonder if we should try to avoid repetition of isFNEG() in combineXor etc. - Maybe split combineFneg into combineFneg and combineFnegPatterns which take the isFNEG result?
Instead of splitting combineFneg, I have removed the assert below and returned early if isFNEG returns an empty node. 


Repository:
  rL LLVM

https://reviews.llvm.org/D48467