[PATCH] D48467: [X86] Recognize a splat of negate in isFNEG

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:36774
+  ShuffleVectorSDNode *SVOp = dyn_cast<ShuffleVectorSDNode>(Op.getNode());
+  if (SVOp) {
+    // For a VECTOR_SHUFFLE(VEC1, VEC2), if the VEC2 is undef, then the negate
----------------
```
if (auto *SVOp = dyn_cast<ShuffleVectorSDNode>(Op.getNode()))
```


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:36849
+  else
+    return Negate(Op0, Op1);
 }
----------------
```
if (Opc == ISD::FSUB)
  std::swap(Op0, Op1);
return Negate(Op0, Op1);
```


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:36856
   EVT OrigVT = N->getValueType(0);
-  SDValue Arg = isFNEG(N);
+  SDValue Arg = isFNEG(DAG, N);
   assert(Arg.getNode() && "N is expected to be an FNEG node");
----------------
Now that we're creating new nodes inside isFNEG() I wonder if we should try to avoid repetition of isFNEG() in combineXor etc. - Maybe split combineFneg into combineFneg and combineFnegPatterns which take the isFNEG result?


Repository:
  rL LLVM

https://reviews.llvm.org/D48467