[PATCH] D49027: [TableGen] FixedLenDecoderEmitter: allow for dummy operand in MCInst
Tim Renouf via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 8 15:06:12 PDT 2018
tpr added inline comments.
================
Comment at: include/llvm/Target/Target.td:584-588
+ /// Normally a "dummy" operand (an operand named in InOperandList or
+ /// OutOperandList but not appearing in the instruction encoding) does not
+ /// appear in the MCInst. Setting this to 1 means that the disassembler
+ /// pushes an immediate 0 operand onto the MCInst for such a dummy operand.
+ bit hasDummyOperands = 0;
----------------
arsenm wrote:
> Dummy operand seems like the wrong name for this. Also can't this property be inferred already by checking which operands appear in the encodings? Why does an explicit bit need to be added for it?
If there is an operand that does not appear in the instruction encoding, does the MCInst decoder leave a gap for it by adding a dummy operand, or not? The latter is the current behavior, and there is some code relying on that. The new hasDummyOperands tells it to do the first behavior.
Suggestions welcome for better name.
Repository:
rL LLVM
https://reviews.llvm.org/D49027
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