[PATCH] D49027: [TableGen] FixedLenDecoderEmitter: allow for dummy operand in MCInst

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: include/llvm/Target/Target.td:584-588
+  /// Normally a "dummy" operand (an operand named in InOperandList or
+  /// OutOperandList but not appearing in the instruction encoding) does not
+  /// appear in the MCInst. Setting this to 1 means that the disassembler
+  /// pushes an immediate 0 operand onto the MCInst for such a dummy operand.
+  bit hasDummyOperands = 0;
----------------
Dummy operand seems like the wrong name for this. Also can't this property be inferred already by checking which operands appear in the encodings? Why does an explicit bit need to be added for it?


Repository:
  rL LLVM

https://reviews.llvm.org/D49027