[PATCH] D48936: [X86][SSE] Prefer BLEND(SHL(v, c1), SHL(v, c2)) over MUL(v, c3)
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 5 03:55:15 PDT 2018
RKSimon updated this revision to Diff 154197.
RKSimon added a comment.
Make vXi16 "2shifts+select" more selective - only do it on pre-SSE41 if the shuffle can be widened. Only do on SSE41+ if a single PBLENDW can be used.
Repository:
rL LLVM
https://reviews.llvm.org/D48936
Files:
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/combine-shl.ll
test/CodeGen/X86/lower-vec-shift.ll
test/CodeGen/X86/vec_shift6.ll
test/CodeGen/X86/widen_arith-4.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D48936.154197.patch
Type: text/x-patch
Size: 11069 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180705/8d52fcde/attachment.bin>
More information about the llvm-commits
mailing list