[llvm] r336052 - [X86] Use MVT::i8 for scalar shift amounts since that is what they ultimately need to legalize to.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat Jun 30 11:30:31 PDT 2018
Author: ctopper
Date: Sat Jun 30 11:30:31 2018
New Revision: 336052
URL: http://llvm.org/viewvc/llvm-project?rev=336052&view=rev
Log:
[X86] Use MVT::i8 for scalar shift amounts since that is what they ultimately need to legalize to.
I believe all of these are constants so legalizing them should be pretty trivial, but this saves a step.
In one case it looks like we may have been creating a shift amount larger than the shift input itself.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=336052&r1=336051&r2=336052&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Jun 30 11:30:31 2018
@@ -10820,7 +10820,7 @@ static SDValue lowerVectorShuffleAsTrunc
// vpbroadcast+vmovd+shr to vpshufb(m)+vmovd.
if (const int OffsetIdx = BroadcastIdx % Scale)
Scalar = DAG.getNode(ISD::SRL, DL, Scalar.getValueType(), Scalar,
- DAG.getConstant(OffsetIdx * EltSize, DL, Scalar.getValueType()));
+ DAG.getConstant(OffsetIdx * EltSize, DL, MVT::i8));
return DAG.getNode(X86ISD::VBROADCAST, DL, VT,
DAG.getNode(ISD::TRUNCATE, DL, EltVT, Scalar));
@@ -15353,7 +15353,7 @@ X86TargetLowering::LowerEXTRACT_VECTOR_E
int ShiftVal = (IdxVal % 4) * 8;
if (ShiftVal != 0)
Res = DAG.getNode(ISD::SRL, dl, MVT::i32, Res,
- DAG.getConstant(ShiftVal, dl, MVT::i32));
+ DAG.getConstant(ShiftVal, dl, MVT::i8));
return DAG.getNode(ISD::TRUNCATE, dl, VT, Res);
}
@@ -15364,7 +15364,7 @@ X86TargetLowering::LowerEXTRACT_VECTOR_E
int ShiftVal = (IdxVal % 2) * 8;
if (ShiftVal != 0)
Res = DAG.getNode(ISD::SRL, dl, MVT::i16, Res,
- DAG.getConstant(ShiftVal, dl, MVT::i16));
+ DAG.getConstant(ShiftVal, dl, MVT::i8));
return DAG.getNode(ISD::TRUNCATE, dl, VT, Res);
}
@@ -16074,7 +16074,7 @@ X86TargetLowering::LowerGlobalTLSAddress
auto &DL = DAG.getDataLayout();
SDValue Scale =
- DAG.getConstant(Log2_64_Ceil(DL.getPointerSize()), dl, PtrVT);
+ DAG.getConstant(Log2_64_Ceil(DL.getPointerSize()), dl, MVT::i8);
IDX = DAG.getNode(ISD::SHL, dl, PtrVT, IDX, Scale);
res = DAG.getNode(ISD::ADD, dl, PtrVT, ThreadPointer, IDX);
@@ -34968,7 +34968,7 @@ static SDValue lowerX86CmpEqZeroToCtlzSr
// encoding of shr and lzcnt is more desirable.
SDValue Trunc = DAG.getZExtOrTrunc(Clz, dl, MVT::i32);
SDValue Scc = DAG.getNode(ISD::SRL, dl, MVT::i32, Trunc,
- DAG.getConstant(Log2b, dl, VT));
+ DAG.getConstant(Log2b, dl, MVT::i8));
return DAG.getZExtOrTrunc(Scc, dl, ExtTy);
}
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