[PATCH] D48580: [AArch64] Support reserving x1-7 registers.

[Kristof Beyls via Phabricator via llvm-commits]

kristof.beyls added a comment.

In https://reviews.llvm.org/D48580#1145509, @efriedma wrote:

>




>> the compiler giving an error may prevent the user from doing something he understands and needs to be done and cannot be achieved in any other way
> 
> I'm mostly worried we'll end up in situations where the option appears to work, but then miscompiles with a newer compiler, or different optimization options.  For example, the code you explicitly wrote doesn't pass arguments in x7, but argpromotion increases the number of arguments to a function.  Or your code doesn't pass arguments in x2, but -Os makes a struct assignment lower to a call to memcpy instead of expanding the copy inline.  Or a user tries to reserve x16, we outline some code, and the linker inserts a stub that clobbers x16.

That makes a lot of sense to me. I'm not sure how easy it would be to implement such an error/warning/diagnostic without needing to add some custom logic to a lot of passes. Did you happen to have any thoughts on what a feasible way might be to implement that?


Repository:
  rL LLVM

https://reviews.llvm.org/D48580