[llvm] r335715 - [AArch64] Remove Duplicate FP16 Patterns with same encoding, match on existing patterns

[Luke Geeson via llvm-commits]

Hi Tim,

Thanks for pointing that out, I agree, shall revert that specific case and fix.

Thanks

Luke


________________________________
From: Tim Northover <t.p.northover at gmail.com>
Sent: 27 June 2018 14:59:54
To: Luke Geeson
Cc: LLVM Commits
Subject: Re: [llvm] r335715 - [AArch64] Remove Duplicate FP16 Patterns with same encoding, match on existing patterns

Hi Luke,

On Wed, 27 Jun 2018 at 10:24, Luke Geeson via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
>  define dso_local half @test_vcvth_n_f16_s64_1(i64 %a) {
>  ; CHECK-LABEL: test_vcvth_n_f16_s64_1:
>  ; CHECK:         fmov d0, x0
> -; CHECK-NEXT:    fcvtzs h0, d0, #1
> +; CHECK-NEXT:    scvtf h0, h0, #1
>  ; CHECK-NEXT:    ret
>  entry:
>    %vcvth_n_f16_s64 = tail call half @llvm.aarch64.neon.vcvtfxs2fp.f16.i64(i64 %a, i32 1)

This doesn't look right to me. We're discarding the high bits of %a
before doing the conversion.

I suspect only the i16 versions would ever want to use these patterns
anyway (since "scvtf h0, x0, #1" exists).

Cheers.

Tim.
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