[PATCH] D47872: [AArch64] Clean up LSE directive tests

[Bernard Ogden via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL335585: [AArch64] Clean up LSE directive tests (authored by bogden, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D47872?vs=152257&id=152860#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D47872

Files:
  llvm/trunk/test/MC/AArch64/directive-arch.s
  llvm/trunk/test/MC/AArch64/directive-cpu.s


Index: llvm/trunk/test/MC/AArch64/directive-arch.s
===================================================================
--- llvm/trunk/test/MC/AArch64/directive-arch.s
+++ llvm/trunk/test/MC/AArch64/directive-arch.s
@@ -8,3 +8,12 @@
 # CHECK: 	aesd	v0.16b, v2.16b
 # CHECK:        eor     v0.16b, v0.16b, v2.16b
 
+// PR32873: without extra features, '.arch' is currently ignored.
+// Add an unrelated feature to accept the directive.
+	.arch armv8.1-a+crypto
+        casa  w5, w7, [x20]
+# CHECK:        casa    w5, w7, [x20]
+
+	.arch armv8-a+lse
+	casa  w5, w7, [x20]
+# CHECK:        casa    w5, w7, [x20]
Index: llvm/trunk/test/MC/AArch64/directive-cpu.s
===================================================================
--- llvm/trunk/test/MC/AArch64/directive-cpu.s
+++ llvm/trunk/test/MC/AArch64/directive-cpu.s
@@ -36,10 +36,10 @@
 
 	aesd v0.16b, v2.16b
 
-	.cpu generic+v8.1a+nolse
+	.cpu generic+nolse
         casa  w5, w7, [x20]
 
-	.cpu generic+v8.1a+lse
+	.cpu generic+lse
         casa  w5, w7, [x20]
 
 // NOTE: the errors precede the actual output!  The errors appear in order


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